參數(shù)資料
型號(hào): 74LVTH16244MTD
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage16-Bit Buffer/Line Driver with 3-STATE Outputs
中文描述: LVT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, MO-153, TSSOP-48
文件頁(yè)數(shù): 5/19頁(yè)
文件大小: 495K
代理商: 74LVTH16244MTD
www.ti.com
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
Recommended Operating Conditions
(1)
SN54LVTH16244A, SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142Q–MAY 1992–REVISED OCTOBER 2005
MIN
–0.5
–0.5
–0.5
–0.5 V
CC
+ 0.5
MAX
4.6
UNIT
V
V
V
CC
V
I
V
O
V
O
Supply voltage range
Input voltage range
(2)
Voltage range applied to any output in the high-impedance or power-off state
(2)
Voltage range applied to any output in the high state
(2)
7
7
V
SN54LVTH16244A
SN74LVTH16244A
SN54LVTH16244A
SN74LVTH16244A
V
I
< 0
V
O
< 0
DGG package
DGV package
DL package
GQL/ZQL package
GRD/ZRD package
96
I
O
Current into any output in the low state
V
128
48
64
–50
–50
70
58
63
42
36
150
I
O
Current into any output in the high state
(3)
V
I
IK
I
OK
Input clamp current
Output clamp current
mA
mA
θ
JA
Package thermal impedance
(4)
°
C/W
T
stg
Storage temperature range
–65
°
C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
The current flows only when the output is in the high state and V
> V
.
The package thermal impedance is calculated in accordance with JESD 51-7.
(2)
(3)
(4)
SN54LVTH16244A
MIN
2.7
2
SN74LVTH16244A
MIN
2.7
2
UNIT
MAX
3.8
MAX
3.8
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
t/
v
t/
V
CC
T
A
Supply voltage
High-level input voltage
Low-level input voltage
Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
Operating free-air temperature
V
V
V
V
0.8
5.5
–25
48
10
0.8
5.5
–32
64
10
mA
mA
ns/V
μ
s/V
°
C
Outputs enabled
200
–55
200
–40
125
85
(1)
All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
5
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