參數資料
型號: 74LVT374WM
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
中文描述: LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: 0.300 INCH, LEAD FREE, MS-013, SOIC-20
文件頁數: 2/12頁
文件大小: 98K
代理商: 74LVT374WM
Philips Semiconductors
Product specification
74LVT374
3.3V Octal D-type flip-flop; positive-edge trigger
(3-State)
2
1998 Feb 19
853-1826 18985
FEATURES
Inputs and outputs on opposite side of package allow easy
interface to microprocessors
3-State outputs for bus interfacing
Common output enable
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74LVT374 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74LVT374 is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates.
The register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “OFF” state, which
means they will neither drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
C
L
= 50pF;
V
CC
= 3.3V
V
I
= 0V or 3.0V
Outputs disabled;
V
I/O
= 0V or 3.0V
Outputs disabled;
V
CC
= 3.6V
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
Propagation delay
CP to Qn
Input capacitance
3.2
3.5
4
ns
pF
C
OUT
Output capacitance
7
pF
I
CCZ
Total supply current
0.13
mA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic SOL
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74LVT374 D
74LVT374 DB
74LVT374 PW
NORTH AMERICA
74LVT374 D
74LVT374 DB
74LVT374PW DH
DWG NUMBER
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Q4
GND
D4
D5
Q5
Q6
D6
D7
Q7
V
CC
CP
SA00110
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1
OE
Output enable input (active-Low)
3, 4, 7, 8,
13, 14, 17,
18
D0-D7
Data inputs
2, 5, 6, 9,
12, 15, 16,
19
Q0-Q7
Data outputs
11
CP
Clock pulse input (active rising edge)
10
GND
Ground (0V)
20
V
CC
Positive supply voltage
相關PDF資料
PDF描述
74LVT374MTC Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
74LVT534 Automotive Catalog Octal Transparent D-Type Latches With 3-State Outputs 20-TSSOP -40 to 125
74LVT534PWDH Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SOIC -40 to 85
74LVT543 Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SOIC -40 to 85
74LVT543PWDH Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SOIC -40 to 85
相關代理商/技術參數
參數描述
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74LVT374WMX 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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74LVT534D,112 功能描述:觸發(fā)器 3.3V OCTAL D-TYPE RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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