參數(shù)資料
型號(hào): 74LVT16244BDL,118
廠商: NXP Semiconductors
文件頁數(shù): 17/18頁
文件大小: 0K
描述: IC BUFF DVR TRI-ST 16BIT 48SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 1,000
系列: 74LVT
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 4
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 32mA,64mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
74LVT_LVTH16244B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 11 — 1 March 2012
8 of 18
NXP Semiconductors
74LVT16244B; 74LVTH16244B
3.3 V 16-bit buffer/driver; 3-state
[1]
Typical values are measured at VCC = 3.3 V and at Tamb = 25 C.
[2]
Unused pins at VCC or GND.
[3]
This is the bus hold overdrive current required to force the input to the opposite logic state.
[4]
This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V 0.3 V
a transition time of 100
s is permitted. This parameter is valid for T
amb = 25 C only.
[5]
ICC is measured with outputs pulled to VCC or GND.
[6]
This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
10. Dynamic characteristics
[1]
Typical values are measured at VCC = 3.3 V and Tamb = 25 C.
CI
input capacitance
VI = 0V or 3.0V
-
3
-
pF
CO
output capacitance
outputs disabled; VO = 0 V or 3.0 V
-
9
-
pF
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 C to +85 C[1]
tPLH
LOW to HIGH
propagation delay
nAn to nYn; see Figure 6
VCC = 2.7 V
-
4.0
ns
VCC = 3.0 V to 3.6 V
0.5
1.8
3.2
ns
tPHL
HIGH to LOW
propagation delay
nAn to nYn; see Figure 6
VCC = 2.7 V
-
4.0
ns
VCC = 3.0 V to 3.6 V
0.5
1.7
3.2
ns
tPZH
OFF-state to HIGH
propagation delay
nOE to nYn; see Figure 7
VCC = 2.7 V
-
5.0
ns
VCC = 3.0 V to 3.6 V
1.0
2.3
4.0
ns
tPZL
OFF-state to LOW
propagation delay
nOE to nYn; see Figure 7
VCC = 2.7 V
-
5.3
ns
VCC = 3.0 V to 3.6 V
1.0
2.1
4.0
ns
tPHZ
HIGH to OFF-state
propagation delay
nOE to nYn; see Figure 7
VCC = 2.7 V
-
5.0
ns
VCC = 3.0 V to 3.6 V
1.0
3.2
4.5
ns
tPLZ
LOW to OFF-state
propagation delay
nOE to nYn; see Figure 7
VCC = 2.7 V
-
4.4
ns
VCC = 3.0 V to 3.6 V
1.0
2.9
4.0
ns
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