參數(shù)資料
型號: 74LVT14
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: 12-Bit Asynchronous Binary Counters 16-SO -40 to 85
中文描述: 3.3六角逆變器施密特觸發(fā)器
文件頁數(shù): 2/10頁
文件大?。?/td> 102K
代理商: 74LVT14
Philips Semiconductors
Product specification
74LVT14
3.3V Hex inverter Schmitt trigger
2
1996 Aug 28
853-1870 17244
DESCRIPTION
The 74LVT14 is a high-performance BiCMOS product designed for
V
CC
operation at 3.3V. They are capable of transforming slowly
changing input signals into sharply defined, jitter free output signals.
In addition, they have greater noise margin than conventional
inverters. Each circuit contains a Schmitt trigger followed by a
Darlington level shifter and a phase splitter driving a TTL totem-pole
output. The Schmitt trigger uses positive feedback to effectively
speed-up slow input transitions, and provide different input threshold
voltages for positive-going and negative-going input threshold
(typically 600mV) is determined internally by resistor ratios and is
insensitive to temperature and supply voltage variations.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C;
TYPICAL
UNIT
t
PLH
t
PHL
Propagation
delay
An to Yn
C
L
= 50pF;
V
CC
= 3.3V
3.2
3.0
ns
C
IN
Input
capacitance
V
I
= 0V or 3.0V
3
pF
I
CCL
Total supply
current
Outputs low;
V
CC
= 3.6V
1.5
mA
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
Y4
A3
Y3
A4
A5
Y5
A0
Y0
Y2
A1
Y1
A2
SA00338
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
1, 3, 5, 9,
11, 13
An
Data inputs
2, 4, 6, 8,
10, 12
Yn
Data outputs
7
GND
Ground (0V)
14
V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUT
Dn
Qn
L
H
H
L
NOTES:
H = High voltage level
L
= Low voltage level
LOGIC DIAGRAM
V
= Pin 14
GND = Pin 7
SV00087
2
4
6
8
10
12
Y0
Y1
Y2
Y3
Y4
Y5
1
3
5
9
11
13
A0
A1
A2
A3
A4
A5
IEC/IEEE SYMBOL
13
1
SF00031
12
11
10
9
8
5
6
3
4
1
2
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
14-Pin Plastic SSOP
14-Pin Plastic TSSOP
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74LVT14 D
74LVT14 DB
74LVT14 PW
NORTH AMERICA
74LVT14 D
74LVT14 DB
74LVT14 PWDH
DWG NUMBER
SOT108-1
SOT337-1
SOT402-1
相關PDF資料
PDF描述
74LVT162240A 12-Bit Asynchronous Binary Counters 16-SO -40 to 85
74LVT162244B 12-Bit Asynchronous Binary Counters 16-TSSOP -40 to 85
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74LVT162373 3.3V LVT 16-bit transparent D-type latch with 30Ω termination resistors (3-State)(帶30Ω終端電阻的3.3V LVT 16位透明D鎖存器(三態(tài)))
74LVT162374 3.3V LVT 16-bit edge-triggered D-type flip-flop with 30 ohm termination resistors 3-State
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