參數(shù)資料
型號: 74LVT126
廠商: NXP Semiconductors N.V.
英文描述: 3.3V Quad buffer 3-State
中文描述: 3.3四緩沖三態(tài)
文件頁數(shù): 2/10頁
文件大小: 86K
代理商: 74LVT126
Philips Semiconductors
Product specification
74LVT126
3.3V Quad buffer (3-State)
2
1998 Feb 19
853-1822 18991
FEATURES
Quad bus interface
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Power-up 3-State
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The LVT126 is a high-performance BiCMOS product designed for
V
CC
operation at 3.3V.
This device combines low static and dynamic power dissipation with
high speed and high output drive.
The 74LVT126 device is a quad buffer that is ideal for driving bus
lines. The device features four Output Enables (OE0, OE1, OE2,
OE3), each controlling one of the 3-State outputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
Propagation delay
An to Yn
Input capacitance
Output capacitance
Total supply current
C
L
= 50pF; V
CC
= 3.3V
2.3
2.4
4
8
0.13
ns
V
I
= 0V or V
CC
Outputs disabled; V
O
= 0V or 3.0V
Outputs disabled; V
CC
= 3.6V
pF
pF
mA
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
14-Pin Plastic SSOP
14-Pin Plastic TSSOP
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74LVT126 D
74LVT126 DB
74LVT126 PW
NORTH AMERICA
74LVT126 D
74LVT126 DB
74LVT126PW DH
DWG NUMBER
SOT108-1
SOT337-1
SOT402-1
PIN DESCRIPTION
PIN NUMBER
2, 5, 9, 12
3, 6, 8, 11
1, 4, 10, 13
SYMBOL
A0 – A3
Y0 – Y3
OE0 – OE3
GND
V
CC
NAME AND FUNCTION
Data inputs
Data outputs
Output enable inputs
Ground (0V)
Positive supply voltage
7
14
PIN CONFIGURATION
OE0
A0
Y0
OE1
A1
Y1
GND
Y2
A2
OE2
Y3
A3
OE3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SA00031
LOGIC SYMBOL
2
3
Y0
OE0
1
5
6
Y1
OE1
4
9
8
Y2
OE2
10
12
11
Y3
13
A0
A1
A2
A3
SV00093
OE3
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