參數(shù)資料
型號: 74LVQ240M
廠商: 意法半導體
英文描述: LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS INVERTED
中文描述: 低壓八路總線緩沖器3態(tài)輸出倒立
文件頁數(shù): 1/8頁
文件大?。?/td> 64K
代理商: 74LVQ240M
74LVQ240
LOW VOLTAGE OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (INVERTED)
February 1999
ORDER CODES :
74LVQ240M
74LVQ240T
M
(Micro Package)
I
HIGHSPEED:
t
PD
=6 ns(TYP.)at V
CC
= 3.3V
I
COMPATIBLEWITH TTL OUTPUT
I
LOWPOWERDISSIPATION:
I
CC
=4
μ
A(MAX.) at T
A
=25
o
C
I
LOWNOISE:
V
OLP
=0.4V(TYP.)at V
CC
= 3.3V
I
75
TRANSMISSIONLINEOUTPUT DRIVE
CAPABILITY
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 12mA(MIN)
I
PCIBUSLEVELSGUARANTEED AT24mA
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 2Vto 3.6V (1.2VData Retention)
I
PINANDFUNCTION COMPATIBLEWITH
74 SERIES240
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The LVQ240is a low voltage CMOS OCTAL BUS
BUFFER fabricated with sub-micron silicon gate
and
double-layer
metal
wiring
C
2
MOS
T
(TSSOPPackage)
technology.It is ideal for low power and low noise
3.3Vapplications.
It has better speed performance at 3.3V than 5V
LSTTL family combined with the true CMOS low
power consumption.
G output control governsfour BUSBUFFERs.
This device is designed to be used with 3 state
memory addressdrivers, etc.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8
相關(guān)PDF資料
PDF描述
74LVQ240T LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS INVERTED
74LVQ240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
74LVQ240QSC Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
74LVQ240SC Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
74LVQ240SJ Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
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