參數(shù)資料
型號: 74LVQ163TTR
廠商: 意法半導體
元件分類: 通用總線功能
英文描述: SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
中文描述: 同步預置4位計數(shù)器
文件頁數(shù): 1/13頁
文件大?。?/td> 259K
代理商: 74LVQ163TTR
1/13
July 2001
I
HIGH SPEED:
f
MAX
= 180 MHz (TYP.) at V
CC
= 3.3 V
COMPATIBLE WITH TTL OUTPUTS
LOW POWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25°C
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
= 3.3V
75
TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 12mA (MIN) at V
CC
= 3.0 V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 163
IMPROVED LATCH-UP IMMUNITY
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DESCRIPTION
The 74LVQ163 is a low voltage CMOS
SYNCHRONOUS PRESETTABLE COUNTER
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology. It is
ideal for low power and low noise 3.3V
applications. It is a 4 bit binary counter with
Synchronous Clear.
The circuit have four fundamental modes of
operation, in order of preference: synchronous
reset, parallel load, count-up and hold. Four
control inputs, Master Reset (CLEAR), Parallel
Enable Input (LOAD), Count Enable Input (PE)
and Count Enable Carry Input (TE), determine the
mode of operation as shown in the Truth Table. A
LOW signal on CLEAR overrides counting and
parallel loading and allows all outputs to go LOW
on the next rising edge of CLOCK. A LOW signal
on LOAD
overrides counting and allows
information on Parallel Data Qn inputs to be
loaded into the flip-flops on the next rising edge of
CLOCK. With LOAD and CLEAR, PE and TE
permit counting when both are high. Conversely, a
LOW signal on either PE and TE inhibits counting.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVQ163
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
TSSOP
74LVQ163M
74LVQ163MTR
74LVQ163TTR
TSSOP
SOP
相關PDF資料
PDF描述
74LVQ174M HEX D-TYPE FLIP FLOP WITH CLEAR
74LVQ174T HEX D-TYPE FLIP FLOP WITH CLEAR
74LVQ174 Low Voltage Hex D-Type Flip-Flop with Master Reset
74LVQ174SC Low Voltage Hex D-Type Flip-Flop with Master Reset
74LVQ174SJ Low Voltage Hex D-Type Flip-Flop with Master Reset
相關代理商/技術(shù)參數(shù)
參數(shù)描述
74LVQ174M 功能描述:觸發(fā)器 RO 511-74LVQ174M-TR RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LVQ174MTR 功能描述:觸發(fā)器 Hex "D" Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LVQ174SC 功能描述:觸發(fā)器 Hex D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LVQ174SC_Q 功能描述:觸發(fā)器 Hex D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LVQ174SCX 功能描述:觸發(fā)器 Hex D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel