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參數(shù)資料
| 型號(hào)： | 74LVCH322245AEC/G; |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BUS TRSCVR 3-ST 32BIT 96LFBGA |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 1,425 |
| 系列： | 74LVCH |
| 邏輯類型： | 收發(fā)器，非反相 |
| 元件數(shù)： | 4 |
| 每個(gè)元件的位元數(shù)： | 8 |
| 輸出電流高，低： | 12mA，12mA |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 96-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 96-LFBGA（13.5x5.5） |
| 包裝： | 托盤 |
| 其它名稱： | 74LVCH322245AEC/G 74LVCH322245AEC/G-ND 935281143557 |
1.
General description
The 74LVCH322245A is a 32-bit transceiver featuring non-inverting 3-state bus
compatible outputs in both send and receive directions. The device features four output
enable (nOE) inputs for easy cascading and four send/receive (nDIR) inputs for direction
control. Pin nOE controls the outputs so that the buses are effectively isolated. The device
is designed with 30
series termination resistors in both HIGH and LOW output stages to
reduce line noise.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices in mixed
3.3 V and 5 V applications.
To ensure the high-impedance state during power-up or power-down, pin nOE should be
tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by
the current-sinking capability of the driver.
Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused
inputs.
2.
Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground
bounce
Direct interface with TTL levels
Integrated 30
termination resistors
All data inputs have bus hold
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 Cto+85 C and 40 Cto+125 C
74LVCH322245A
32-bit bus transceiver with direction pin; 30
series
termination resistors; 5 V tolerant; 3-state
Rev. 4 — 20 December 2011
Product data sheet
相關(guān)PDF資料 |
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| OSTVD133152 | TERM BLOCK PLUG 3.81MM 13POS |
| OSTHI100050 | CONN TERM BLOCK 10POS 5MM |
| 74LVCH322244AEC/G; | IC BUFF DVR TRI-ST 32BIT 96LFBGA |
| 74LVCH322245AEC/G, | IC BUS TRSCVR 3-ST 32BIT 96LFBGA |
| 74LVCH322244AEC/G, | IC BUFF DVR TRI-ST 32BIT 96LFBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVCH322245AECG-S | 功能描述:總線收發(fā)器 32-BIT 5V TOL I/O BUFFER TRAN RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVCH322245AEC-S | 功能描述:總線收發(fā)器 32-BIT 5V TOL I/O BUFFER TRAN RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVCH32244ABF | 制造商:Integrated Device Technology Inc 功能描述:Driver/Buffer Device, Octal, 4-Bit, 96 Pin, Plastic, BGA |
| 74LVCH32244AEC | 功能描述:緩沖器和線路驅(qū)動(dòng)器 32-BIT 5V TOL I/O BUFFER 3-S RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74LVCH32244AEC,518 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 32-BIT 5V TOL I/O RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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