參數(shù)資料
型號(hào): 74LVCH322244AEC/G,
廠商: NXP Semiconductors
文件頁數(shù): 8/14頁
文件大小: 0K
描述: IC BUFF DVR TRI-ST 32BIT 96LFBGA
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 3,500
系列: 74LVCH
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 8
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 12mA,12mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 96-LFBGA
供應(yīng)商設(shè)備封裝: 96-LFBGA(13.5x5.5)
包裝: 帶卷 (TR)
其它名稱: 74LVCH322244AECG-T
74LVCH322244AECG-T-ND
935281138518
74LVCH322244A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 16 December 2011
3 of 14
NXP Semiconductors
74LVCH322244A
32-bit buffer/line driver; 30
resistors; 5 V tolerance; 3-state
5.
Pinning information
5.1 Pinning
5.2 Pin description
Fig 3.
Pin configuration
mna471
1A1
1A3
2A1
2A3
3A1
3A3
4A1
4A2
5A1
5A3
6A1
6A3
7A1
7A3
8A1
8A2
1A0
1A2
2A0
2A2
3A0
3A2
4A0
4A3
5A0
5A2
6A0
6A2
7A0
7A2
8A0
8A3
1Y0
1Y2
2Y0
2Y2
3Y0
3Y2
4Y0
4Y3
5Y0
5Y2
6Y0
6Y2
7Y0
7Y2
8Y0
8Y3
1Y1
1Y3
2Y1
2Y3
3Y1
3Y3
4Y1
4Y2
5Y1
5Y3
6Y1
6Y3
7Y1
7Y3
8Y1
8Y2
2OE
3OE 6OE
GND
GND GND
GND
7OE
VCC
GND
GND GND
GND
VCC
1OE
6
5
2
1
4
3
4OE 5OE
GND
GND GND
GND
8OE
VCC
GND
GND GND
GND
VCC
AH
J
BD
E
G
T
CF
K
M
N
R
LP
Table 2:
Pin description
Ball
Symbol
Description
nOE (n = 1 to 8)
A3, A4, H4, H3, J3 J4, T4, T3
3-state output enable inputs (active LOW)
1A[0:3]
A5, A6, B5, B6
data input
2A[0:3]
C5, C6, D5, D6
3A[0:3]
E5, E6, F5, F6
4A[0:3]
G5, G6, H6, H5
5A[0:3]
J5, J6, K5, K6
6A[0:3]
L5, L6, M5, M6
7A[0:3]
N5, N6, P5, P6
8A[0:3]
R5, R6, T6, T5
1Y[0:3]
A2, A1, B2, B1
data output
2Y[0:3]
C2, C1, D2, D1
3Y[0:3]
E2, E1, F2, F1
4Y[0:3]
G2, G1, H1, H2
5Y[0:3]
J2, J1, K2, K1
6Y[0:3]
L2, L1, M2, M1
7Y[0:3]
N2, N1, P2, P1
8Y[0:3]
R2, R1, T1, T2
VCC
C3, C4, F3, F4, L3, L4, P3, P4
supply voltage
GND
B3, B4, D3, D4, E3, E4, G3, G4, K3, K4, M3,
M4, N3, N4, R3, R4
ground (0 V)
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