參數(shù)資料
型號: 74LVCH16541ADL,112
廠商: NXP Semiconductors
文件頁數(shù): 13/15頁
文件大小: 0K
描述: IC BUFF DVR TRI-ST 16BIT 48SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 31
系列: 74LVCH
邏輯類型: 緩沖器/線路驅(qū)動器,非反相
元件數(shù): 2
每個元件的位元數(shù): 8
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 管件
其它名稱: 74LVCH16541ADL
74LVCH16541ADL-ND
935238580112
74LVCH16541A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 15 February 2012
7 of 15
NXP Semiconductors
74LVCH16541A
16-bit buffer/line driver; 3-state
10. Dynamic characteristics
[1]
Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(C
L VCC
2
f
o) = sum of the outputs
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C 40 C to +125 C Unit
Min
Max
Min
Max
tpd
propagation
delay
nAntonYn; see Figure 5
VCC = 1.2 V
-
10
-
ns
VCC = 1.65 V to 1.95 V
1.8
4.7
10.4
1.8
12.0
ns
VCC = 2.3 V to 2.7 V
1.5
2.6
5.2
1.5
6.0
ns
VCC = 2.7 V
1.0
2.5
5.0
1.0
6.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.2
4.2
1.0
5.5
ns
ten
enable time
nOEntonYn; see Figure 6
VCC = 1.2 V
-
17
-
ns
VCC = 1.65 V to 1.95 V
1.5
5.5
14.6
1.5
16.8
ns
VCC = 2.3 V to 2.7 V
1.0
3.2
7.7
1.0
8.9
ns
VCC = 2.7 V
1.5
3.4
6.9
1.5
9.0
ns
VCC = 3.0 V to 3.6 V
1.0
2.6
5.6
1.0
7.0
ns
tdis
disable time
nOEntonYn; see Figure 6
VCC = 1.2 V
-
9.0
-
ns
VCC = 1.65 V to 1.95 V
2.6
7.3
9.2
2.6
10.6
ns
VCC = 2.3 V to 2.7 V
1.0
4.1
5.2
1.0
6.0
ns
VCC = 2.7 V
1.5
4.6
6.5
1.5
8.5
ns
VCC = 3.0 V to 3.6 V
1.5
4.5
5.5
1.5
7.0
ns
tsk(o)
output skew
time
VCC = 3.0 V to 3.6 V
-
1.0
-
1.5
ns
CPD
power
dissipation
capacitance
per input; VI =GND to VCC
VCC = 1.65 V to 1.95 V
-
8.5
-
pF
VCC = 2.3 V to 2.7 V
-
12.1
-
pF
VCC = 3.0 V to 3.6 V
-
15.3
-
pF
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