參數(shù)資料
型號： 74LVC86D
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Quad 2-input EXCLUSIVE-OR gate
中文描述： LVC/LCX/Z SERIES, QUAD 2-INPUT XOR GATE, PDSO14
文件頁數(shù)： 2/9頁
文件大?。?/td> 116K
代理商： 74LVC86D
Philips Semiconductors
Product specification
74LVC86
Quad 2-input EXCLUSIVE-OR gate
2
1997 Mar 18
853–1946 17864
FEATURES
Wide supply voltage range of 1.2 to 3.6 V
In accordance with JEDEC standard no. 8-1A.
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
DESCRIPTION
The 74LVC86 is a high-performance, low-power, low-voltage Si-gate
CMOS device that is pin and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC86 provides the 2-input EXCLUSIVE-OR function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
t
PLH
C
I
C
PD
Propagation delay
nA, nB to nY
Input capacitance
C
L
= 15 pF;
V
CC
= 3.3 V
3.7
ns
5.0
pF
Power dissipation capacitance per gate
V
CC
= 3.3 V, V
I
= GND to V
CC1
55
pF
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
74LVC86 N
74LVC86 N
SOT27-1
14-Pin Plastic SO
74LVC86 D
74LVC86 D
SOT108-1
14-Pin Plastic SSOP Type II
74LVC86 DB
74LVC86 DB
SOT337-1
14-Pin Plastic TSSOP Type I
74LVC86 PW
74LVC86PW DH
SOT402-1
PIN CONFIGURATION
SV00481
1
2
3
4
5
6
7
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
14
13
12
11
10
9
8
PIN DESCRIPTION
PIN
NUMBER
1, 4, 9, 12
SYMBOL
FUNCTION
1A – 4A
Data inputs
2, 5, 10, 13
1B – 4B
Data inputs
3, 6, 8, 11
1Y – 4Y
Data outputs
7
GND
Ground (0 V)
14
V
CC
Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
SV00479
1
4
9
12
2
5
10
13
3
6
8
11
= 1
= 1
= 1
= 1
相關PDF資料
PDF描述
74LVC86DB Quad 2-input EXCLUSIVE-OR gate
74LVC86N Quad 2-input EXCLUSIVE-OR gate
74LVC86PW Quad 2-input EXCLUSIVE-OR gate
74LVC86PWDH Quad 2-input EXCLUSIVE-OR gate
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