參數(shù)資料
型號(hào): 74LVC2244A
廠商: NXP Semiconductors N.V.
英文描述: Octal buffer/line driver;with 30Ω series termination resistors; with 5-volt tolerant inputs/outputs (3-State)(帶30Ω系列終端電阻器,5V輸入/輸出容限的八緩沖器/線驅(qū)動(dòng)器(三態(tài)))
中文描述: 八路緩沖器/線路驅(qū)動(dòng)器,與30Ω串聯(lián)終端電阻,與5伏容限輸入/輸出(3國)(帶30Ω系列終端電阻器,5V的輸入/輸出容限的八緩沖器/線驅(qū)動(dòng)器(三態(tài)) )
文件頁數(shù): 2/16頁
文件大?。?/td> 84K
代理商: 74LVC2244A
1999 Sep 30
2
Philips Semiconductors
Product specification
Octal buffer/line driver with 30
series termination
resistors; 5 V input/output tolerant; 3-state
74LVC2244A
FEATURES
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range of 1.2 to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Integrated 30
termination resistors.
DESCRIPTION
The 74LVC2244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. In
3-state operation, outputs can handle 5 V. These features
allow the use of these devices as translators in a mixed
3.3/5 V environment.
The 74LVC2244A is an octal non-inverting buffer/line
driver with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs 1OE and 2OE. A
HIGH on nOE causes the outputs to assume a
high-impedance OFF-state. Schmitt-trigger action at all
inputs makes the circuit highly tolerant for slower input rise
and fall times. The 74LVC2244A is designed with 30
series termination resistors in both HIGH and LOW output
stages to reduce line noise.
QUICK REFERENCE DATA
Ground = 0 V; T
amb
= 25
°
C; t
r
= t
f
2.5 ns.
Note
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W).
P
D
= C
PD
×
V
CC2
×
f
i
+
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
C
I
C
PD
propagation delay 1A
n
to 1Y
n
; 2A
n
to 2Y
n
input capacitance
power dissipation capacitance per buffer
C
L
= 50 pF; V
CC
= 3.3 V
4.0
5.0
25
ns
pF
pF
V
I
= GND to V
CC
; note 1
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