參數(shù)資料
型號(hào): 74LVC1G00GV,125
廠商: NXP Semiconductors
文件頁(yè)數(shù): 14/19頁(yè)
文件大?。?/td> 0K
描述: IC SNGL 2-IN NAND GATE SC-74A
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 1
系列: 74LVC
邏輯類型: 與非門(mén)
電路數(shù): 1
輸入數(shù): 2
電源電壓: 1.65 V ~ 5.5 V
電流 - 靜態(tài)(最大值): 200µA
輸出電流高,低: 32mA,32mA
邏輯電平 - 低: 0.7 V ~ 0.8 V
邏輯電平 - 高: 1.7 V ~ 2 V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 1.8ns @ 5V,50pF
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 5-TSOP
封裝/外殼: SC-74A,SOT-753
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 568-7753-6
74LVC1G00
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 2 July 2012
4 of 19
NXP Semiconductors
74LVC1G00
Single 2-input NAND gate
7.
Functional description
[1]
H = HIGH voltage level; L = LOW voltage level.
8.
Limiting values
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3]
For TSSOP5 and SC-74A packages: above 87.5
C the value of P
tot derates linearly with 4.0 mW/K.
For XSON6 and X2SON5 packages: above 118
C the value of P
tot derates linearly with 7.8 mW/K.
Table 4.
Function table[1]
Inputs
Outputs
A
B
Y
LLH
LH
H
HL
H
HHL
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
0.5
+6.5
V
IIK
input clamping current
VI < 0 V
50
-
mA
VI
input voltage
0.5
+6.5
V
IOK
output clamping current
VO > VCC or VO < 0 V
-
50
mA
VO
output voltage
Active mode
0.5
VCC + 0.5
V
Power-down mode
0.5
+6.5
V
IO
output current
VO = 0 V to VCC
-
50
mA
ICC
supply current
-
+100
mA
IGND
ground current
100
-
mA
Ptot
total power dissipation
Tamb = 40 C to +125 C
250
mW
Tstg
storage temperature
65
+150
C
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