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參數(shù)資料
| 型號： | 74LV74PW,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 1/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DUAL D FF POSEDG TRIG 14TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標準包裝： | 2,500 |
| 系列： | 74LV |
| 功能： | 設(shè)置（預(yù)設(shè)）和復(fù)位 |
| 類型： | D 型 |
| 輸出類型： | 差分 |
| 元件數(shù)： | 2 |
| 每個元件的位元數(shù)： | 1 |
| 頻率 - 時鐘： | 56MHz |
| 觸發(fā)器類型： | 正邊沿 |
| 輸出電流高，低： | 12mA，12mA |
| 電源電壓： | 1 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 包裝： | 帶卷 (TR) |
1.
General description
The 74LV74 is a dual positive edge triggered, D-type flip-flop. It has individual data (nD)
inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ
outputs.
The set and reset are asynchronous active LOW inputs that operate independently of the
clock input. Information on the data input is transferred to the nQ output on the
LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time
prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt-trigger action
in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
2.
Features and benefits
Wide supply voltage range from 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Direct interface with TTL levels (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114-A exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from
40 Cto+85 C and from 40 Cto+125 C
3.
Ordering information
74LV74
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 3 — 9 September 2013
Product data sheet
Table 1.
Ordering information
Type number Package
Temperature range
Name
Description
Version
74LV74N
40 C to +125 C
DIP14
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
74LV74D
40 C to +125 C
SO14
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
74LV74DB
40 C to +125 C
SSOP14
plastic shrink small outline package; 14 leads; body width
5.3 mm
SOT337-1
74LV74PW
40 C to +125 C
TSSOP14 plastic thin shrink small outline package; 14 leads; body
width 4.4 mm
SOT402-1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LV74PWDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual D-type flip-flop with set and reset; positive-edge trigger |
| 74LV74PW-Q100J | 制造商:NXP Semiconductors 功能描述:74LV74PW-Q100/TSSOP14/REEL13// - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FLIP-FLOP DUAL D POS 14TSSOP |
| 74LV74PW-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual D-Type Flip-Flop |
| 74LV86 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad 2-input exclusive-OR gate |
| 74LV86AFPEL-E | 制造商:Renesas Electronics Corporation 功能描述:Cut Tape |
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