參數(shù)資料
型號(hào): 74LV4060DB,112
廠商: NXP Semiconductors
文件頁數(shù): 5/18頁
文件大?。?/td> 0K
描述: IC 14ST BINARY RIPPLE 16-SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 1,092
系列: 74LV
邏輯類型: 二進(jìn)制計(jì)數(shù)器
方向:
元件數(shù): 1
每個(gè)元件的位元數(shù): 14
復(fù)位: 異步
計(jì)數(shù)速率: 90MHz
觸發(fā)器類型: 負(fù)邊沿
電源電壓: 1 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOP
包裝: 管件
9397 750 14402
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
13 of 21
Philips Semiconductors
74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
[1]
All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
12. Waveforms
Table 9:
Dynamic characteristics setup requirements
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 .
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 °C to +85 °C [1]
tsu(H)
set-up time HIGH
nAx to nCPAB or
nBx to nCPBA
VCC = 3.3 V ± 0.3 V
1.0
0.6
-
ns
VCC = 2.7 V
1.1
-
ns
tsu(L)
set-up time LOW
nAx to nCPAB or
nBx to nCPBA
VCC = 3.3 V ± 0.3 V
1.9
0.5
-
ns
VCC = 2.7 V
2.4
-
ns
th(H)
hold time HIGH
nAx to nCPAB or
nBx to nCPBA
VCC = 3.3 V ± 0.3 V
1.0
0.4
-
ns
VCC = 2.7 V
1.0
-
ns
th(L)
hold time LOW
nAx to nCPAB or
nBx to nCPBA
VCC = 3.3 V ± 0.3 V
1.0
0.5
-
ns
VCC = 2.7 V
1.0
-
ns
tW(H)
pulse width HIGH
nCPAB or nCPBA
VCC = 3.3 V ± 0.3 V
2.6
2.2
-
ns
VCC = 2.7 V
2.6
-
ns
tW(L)
pulse width LOW
nCPAB or nCPBA
VCC = 3.3 V ± 0.3 V
2.8
2.4
-
ns
VCC = 2.7 V
2.8
-
ns
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 6.
Propagation delay clock input to output, clock pulse width and maximum clock
frequency
001aac215
tPHL
tPLH
tW(H)
tW(L)
1/fmax
VM
nCPBA or
nCPAB
nAx or nBx
0 V
3.0 V or VCC
whichever
is less
VOH
VOL
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