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參數(shù)資料
| 型號： | 74LV4052PWDH-T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | DUAL 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16 |
| 封裝： | PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 165K |
| 代理商： | 74LV4052PWDH-T |
Philips Semiconductors
Product specification
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
1998 Jun 23
9
ADDITIONAL AC CHARACTERISTICS
Recommended conditions and typical values
GND = 0 V; tr = tf ≤ 2.5ns
SYMBOL
PARAMETER
TYP.
UNIT
VCC
(V)
Vis(p–p)
(V)
CONDITIONS
Sine-wave distortion
f = 1 kHz
0.80
0.40
%
3.0
6.0
2.75
5.50
RL = 10 kW; CL = 50 pf
Figure 9 and 10
Sine-wave distortion
f = 10 kHz
2.40
1.20
%
3.0
6.0
2.75
5.50
RL = 10 kW; CL = 50 pf
Figure 9 and 10
Switch “OFF” signal feed through
–50
dB
3.0
6.0
Note 1
RL = 600 W; CL = 50 pf; f= 1 MHz
Figures 5 and 11
Crosstalk between any two
switches/multiplexers
–60
dB
3.0
6.0
Note 1
RL = 600 W; CL = 50 pf; f= 1 MHz
Figure 8
V(p–p)
Crosstalk voltage between enable or
address input to any switch
(peak-to-peak value)
110
120
mV
3.0
6.0
RL = 600 W; CL = 50 pf; f= 1 MHz
(Sn or E, square wave between VCC
and GND tr = tf = 6 ns) Figure 8
fmax
Minimum frequency response
(–3 dB)
180
200
MHz
3.0
6.0
Note 2
RL = 50 W; CL = 50 pF
Figures 6, 8 and 9
CS
Maximum switch capacitance
5
pf
GENERAL NOTES:
1. Vis is the input voltage at nY or nZ terminal, whichever is assigned as an input.
2. VOS is the output voltage at nY or nZ terminal, whichever is assigned as an output.
NOTES:
1. Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 W).
2. Adjust input voltage Vis is 0 dBm level at VOS for 1 MHz (0 dBm = 1 mW into 50 W).
SV01635
(dB)
f (kHz)
0
10
10 2
10 3
10 4
10 5
10 6
–50
–100
Figure 6. Typical switch “OFF” signal feed-through as a
function of frequency.
SV01636
(dB)
f (kHz)
5
10
10 2
10 3
10 4
10 5
10 6
0
–5
Figure 7. Typical frequency response.
NOTES TO FIGURES 6 AND 7:
Test conditions: VCC = 3.0 V; GND = 0 V; VEE = -3.0 V; RL = 50 W; RSOURCE = 1kW.
SV01663
GND
2RL
VCC
channel
ON
V
is
0.1
mF
RL
nYn/nZ
nZ/nYn
CL
GND
channel
OFF
(b)
(a)
Vos
dB
2RL
nYn/nZ
2RL
VCC
nZ/nYn
2RL
CL
RL
Figure 8. Test circuit for measuring crosstalk between any two switches.
(a) channel ON condition; (b) channel OFF condition.
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