參數(shù)資料
型號: 74LV32
廠商: NXP Semiconductors N.V.
英文描述: Quad 2-input OR gate
中文描述: 四2輸入或門
文件頁數(shù): 2/10頁
文件大?。?/td> 104K
代理商: 74LV32
Philips Semiconductors
Product specification
74LV32
Quad 2-input OR gate
2
1998 Apr 20
853-1897 19258
FEATURES
Wide operating voltage: 1.0 to 5.5 V
Optimized for Low Voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
°
C.
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
AMB
= 25
°
C.
Output capability: standard
I
CC
category: SSI
DESCRIPTION
The 74LV32 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT32.
The 74LV32 provides the 2-input OR function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nA, nB to nY
C
L
= 15 pF;
V
CC
= 3.3 V
6
ns
C
I
C
PD
Input capacitance
3.5
pF
Power dissipation capacitance per gate
V
I
= GND to V
CC1
16
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
–40
°
C to +125
°
C
74LV32 N
74LV32 N
SOT27-1
14-Pin Plastic SO
–40
°
C to +125
°
C
74LV32 D
74LV32 D
SOT108-1
14-Pin Plastic SSOP Type II
–40
°
C to +125
°
C
74LV32 DB
74LV32 DB
SOT337-1
14-Pin Plastic TSSOP Type I
–40
°
C to +125
°
C
74LV32 PW
74LV32PW DH
SOT402-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 4, 9, 12
1A – 4A
Data inputs
2, 5, 10, 13
1B – 4B
Data inputs
3, 6, 8, 11
1Y – 4Y
Data Outputs
7
GND
Ground (0 V)
14
V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUTS
nA
nB
nY
L
L
L
L
H
H
H
L
H
H
H
H
H = HIGH voltage level
L = LOW voltage level
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