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參數(shù)資料
| 型號： | 74LV164PWDH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-bit serial-in/parallel-out shift register |
| 中文描述： | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 119K |
| 代理商： | 74LV164PWDH |
Philips Semiconductors
Product specification
74LV164
8-bit serial-in/parallel-out shift register
2
1998 May 07
853–1961 19349
FEATURES
Wide operating voltage: 1.0 to 5.5V
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
Typical V
OLP
(output ground bounce)
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot)
T
amb
= 25
°
C
Gated serial data inputs
Asynchronous master reset
Output capability: standard
I
CC
category: MSI
0.8V @ V
CC
= 3.3V,
2V @ V
CC
= 3.3V,
DESCRIPTION
The 74LV164 is a low-voltage Si-gate CMOS device and is pin and
function compatible with the 74HC/HCT164.
The 74LV164 is an 8-bit edge-triggered shift register with serial data
entry and an output from each of the eight stages. Data is entered
serially through one of two inputs (D
sa
or D
sb
); either input can be
used as an active HIGH enable for data entry through the other
input. Both inputs must be connected together or an unused input
must be tied HIGH.
Data shifts one place to the right on each LOW-to-HIGH transition of
the clock (CP) input and enters into Q
0
, which is the logical AND of
the two data inputs (D
sa
, D
sb
) that existed one set-up time prior to
the rising clock edge.
A LOW on the master reset (MR) input overrides all other inputs and
clears the register asynchronously, forcing all outputs LOW.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
°
C; t
r
=t
f
SYMBOL
2.5 ns
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
CP to Q
n
MR to Q
n
C
L
= 15pF
V
CC
= 3.3V
12
12
ns
f
max
C
I
Maximum clock frequency
78
MHz
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per gate
V
= 3.3V
Notes 1 and 2
40
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
V
CC2
x f
i
(C
L
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
V
CC2
f
o
) where:
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
–40
°
C to +125
°
C
74LV164 N
74LV164 N
SOT27-1
14-Pin Plastic SO
–40
°
C to +125
°
C
74LV164 D
74LV164 D
SOT108-1
14-Pin Plastic SSOP Type II
–40
°
C to +125
°
C
74LV164 DB
74LV164 DB
SOT337-1
14-Pin Plastic TSSOP Type I
–40
°
C to +125
°
C
74LV164 PW
74LV164PW DH
SOT402-1
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相關代理商/技術參數(shù) |
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| 74LV164PW-Q100J | 制造商:NXP Semiconductors 功能描述:2500 制造商:NXP Semiconductors 功能描述:74LV164PW-Q100/TSSOP14/REEL13/ - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC SHIFT REGISTER 8BIT 14TSSOP 制造商:NXP Semiconductors 功能描述:Counter Shift Registers 8bit serial-in parallel-out |
| 74LV164PW-T | 功能描述:計數(shù)器移位寄存器 8-BIT SI-PO SHIFT REGISTER RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74LV165 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit parallel-in/serial-out shift register |
| 74LV165A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:PARALLEL-LOAD 8-BIT SHIFT REGISTERS |
| 74LV165AD | 功能描述:計數(shù)器移位寄存器 8-BIT PAR IN/SER OUT SHIFT REG RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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