
Philips Semiconductors
Product specification
74LV139
Dual 2-to-4 line decoder/demultiplexer
2
1998 Apr 28
853–1922 19290
FEATURES
Wide operating voltage: 1.0 to 5.5 V
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Demultiplexing capability
Two independent 2-to-4 decoders
Multifunction capability
Active LOW mutually exclusive outputs
Output capability: standard
I
CC
category: MSI
APPLICATIONS
Memory decoding or data-routing
Code conversion
DESCRIPTION
The 74LV139 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT139.
The 74LV139 is a dual 2-to-4 line decoder/demultiplexer. This device
has two independent decoders, each accepting two binary weighted
inputs (nA
0
and nA
1
) and providing four mutually exclusive active
LOW outputs (nY
0
to nY
3
). Each decoder has an active LOW enable
input (nE).
When nE is HIGH, every output is forced HIGH. The enable can be
used as the data input for a 1-to-4 demultiplexer application.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nA
n
to nY
n
,
nE to nY
n
Input capacitance
C
L
= 15 pF;
V
CC
= 3.3 V
11
10
ns
C
I
3.5
pF
C
PD
Power dissipation capacitance per
multiplexer
V
CC
= 3.3 V
V
I
CC1
42
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic DIL
–40
°
C to +125
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
74LV139 N
74LV139 N
SOT38-4
16-Pin Plastic SO
74LV139 D
74LV139 D
SOT109-1
16-Pin Plastic SSOP Type II
74LV139 DB
74LV139 DB
SOT338-1
16-Pin Plastic TSSOP Type I
74LV139 PW
74LV139PW DH
SOT403-1
PIN CONFIGURATION
SV00530
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1E
1A
0
1A
1
1Y
0
1Y
1
1Y
2
1Y
3
GND
V
CC
2E
2A
0
2A
1
2Y
0
2Y
1
2Y
2
2Y
3
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 15
1E, 2E
Enable inputs (active LOW)
2, 3
1A
0
, 1A
1
Address inputs
4, 5, 6, 7
1Y
0
to 1Y
3
Outputs (active LOW)
8
GND
Ground (0 V)
12, 11, 10, 9
2Y
0
to 2Y
3
Outputs (active LOW)
14, 13
2A
0
, 2A
1
Address inputs
16
V
CC
Positive supply voltage