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參數(shù)資料
| 型號： | 74LV132PWDH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad 2-input NAND Schmitt-trigger |
| 中文描述： | LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 117K |
| 代理商： | 74LV132PWDH |
Philips Semiconductors
Product specification
74LV132
Quad 2-input NAND Schmitt-trigger
2
1998 Apr 28
853–1912 19290
FEATURES
Wide operating voltage: 1.0 to 5.5V
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
Typical V
OLP
(output ground bounce)
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot)
T
amb
= 25
°
C
Output capability: standard
I
CC
category: SSI
0.8V @ V
CC
= 3.3V,
2V @ V
CC
= 3.3V,
APPLICATIONS
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
DESCRIPTION
The 74LV132 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT132.
The 74LV132 contains four 2-input NAND gates which accept
standard input signals. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going
signals. The difference between the positive voltage V
T+
and the
negative voltage V
T–
is defined as the hysteresis voltage V
H
.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
°
C; t
r
= t
f
SYMBOL
2.5 ns
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nA, nB to nY
C
L
= 15pF
V
CC
= 3.3V
10
ns
C
I
Input capacitance
3.5
pF
C
PD
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
= C
V
CC2
f
(C
L
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
Power dissipation capacitance per gate
Notes 1 and 2
24
pF
V
CC2
f
) where:
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
–40
°
C to +125
°
C
74LV132 N
74LV132 N
SOT27-1
14-Pin Plastic SO
–40
°
C to +125
°
C
74LV132 D
74LV132 D
SOT108-1
14-Pin Plastic SSOP Type II
–40
°
C to +125
°
C
74LV132 DB
74LV132 DB
SOT337-1
14-Pin Plastic TSSOP Type I
–40
°
C to +125
°
C
74LV132 PW
74LV132PW DH
SOT402-1
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 4, 9, 12
1A to 4A
Data inputs
2, 5, 10, 13
1B to 4B
Data inputs
3, 6, 8, 11
1Y to 4Y
Data outputs
7
GND
Ground (0V)
14
V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUT
nY
H
H
H
L
nA
L
L
H
H
nB
L
H
L
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
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相關代理商/技術參數(shù) |
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|---|---|
| 74LV132PW-Q100J | 制造商:NXP Semiconductors 功能描述:74LV132PW-Q100/TSSOP14/REEL13/ - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC SCHMITT TRIGGER NAND 14TSSOP |
| 74LV132PW-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate |
| 74LV138 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-to-8 line decoder/multiplexer; inverting |
| 74LV138A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
| 74LV138BQ | 制造商:NXP Semiconductors 功能描述:IC 3-8 LINE DECODER/DEMUX DHVQFN16 制造商:NXP Semiconductors 功能描述:IC, 3-8 LINE DECODER/DEMUX, DHVQFN16, Logic Type:3-to-8 Line Decoder / Demultipl |
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