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參數(shù)資料
| 型號： | 74LCX573MTCX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LATCH OCT LV 5V I/O 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | 74LCX |
| 邏輯類型： | D 型透明鎖存器 |
| 電路： | 8:8 |
| 輸出類型： | 三態(tài) |
| 電源電壓： | 2 V ~ 3.6 V |
| 獨立電路： | 1 |
| 延遲時間 - 傳輸： | 1.5ns |
| 輸出電流高，低： | 24mA，24mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 74LCX573MTCXDKR |
74LCX573
—
Lo
w
V
olta
g
e
Octal
Latc
h
with
5V
T
olerant
Inputs
and
Outputs
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LCX573 Rev. 1.6.1
74LCX573
Low Voltage Octal Latch with 5V Tolerant
Inputs and Outputs
Features
■ 5V tolerant inputs and outputs
■ 2.3V–3.6V VCC specifications provided
■ 7.0 ns tPD max. (VCC = 3.3V), 10A ICC max.
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal(1)
■ ±24mA output drive (VCC = 3.0V)
■
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance
– Human body model
> 2000V
– Machine model
> 200V
■ Leadless DQFN package
Note:
1. To ensure the high impedance state during power up
or down, OE should be tied to VCC through a pull-up
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
General Description
The LCX573 is a high-speed octal latch with buffered
common Latch Enable (LE) and buffered common Out-
put Enable (OE) input.
The LCX573 is functionally identical to the LCX373 but
has inputs and outputs on opposite sides.
The LCX573 is designed for low voltage applications
with capability of interfacing to a 5V signal environment.
The LCX573 is fabricated with an advanced CMOS
tech-
nology to achieve high speed operation while
maintaining CMOS low power dissipation.
Ordering Information
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order
Number
Package
Number
Package Description
74LCX573WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX573SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX573BQX(2)
MLP20B
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 4.5mm
74LCX573MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX573MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Implements proprietary noise/EMI reduction circuitry
December 2013
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LVX573MTCX | IC LATCH OCTAL LV 3STATE 20TSSOP |
| VI-232-MU-F4 | CONVERTER MOD DC/DC 15V 200W |
| 74VHCT573AMTCX | IC LATCH OCTAL D 3STATE 20TSSOP |
| VI-232-MU-F3 | CONVERTER MOD DC/DC 15V 200W |
| VI-231-MU-F2 | CONVERTER MOD DC/DC 12V 200W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LCX573MTCX_NL | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs |
| 74LCX573MTCX-NL3 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs |
| 74LCX573MTR | 功能描述:閉鎖 Quad "D" Flip-Flop RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LCX573SJ | 功能描述:閉鎖 Octal Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LCX573SJ_08 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs |
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