參數(shù)資料
型號: 74LCX543WM
廠商: Fairchild Semiconductor
文件頁數(shù): 1/8頁
文件大小: 0K
描述: IC REGISTERED TXRX 8BIT 24SOIC
標準包裝: 30
系列: 74LCX
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 1
每個元件的位元數(shù): 8
輸出電流高,低: 24mA,24mA
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 24-SOIC
包裝: 管件
2001 Fairchild Semiconductor Corporation
DS012463
www.fairchildsemi.com
May 1995
Revised March 2001
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74LCX543
Low Voltage Octal Registered Transceiver with
5V Tolerant Inputs and Outputs
General Description
The LCX543 is a non-inverting octal transceiver containing
two sets of D-type registers for temporary storage of data
flowing in either direction. Separate Latch Enable and Out-
put Enable inputs are provided for each register to permit
independent input and output control in either direction of
data flow.
The LCX543 is designed for low voltage (2.5V or 3.3V) VCC
applications with capability of interfacing to a 5V signal
environment.
The LCX543 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V
3.6V V
CC specifications provided
s 7.0 ns tPD max (VCC = 3.3V), 10 A ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s
±24 mA Output Drive (V
CC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model
> 2000V
Machine model
> 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Order Number
Package Number
Package Description
74LCX543WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LCX543MSA
MSA24
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX543MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
OEAB
A-to-B Output Enable Input (Active LOW)
OEBA
B-to-A Output Enable Input (Active LOW)
CEAB
A-to-B Enable Input (Active LOW)
CEBA
B-to-A Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input (Active LOW)
LEBA
B-to-A Latch Enable Input (Active LOW)
A0–A7
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B0–B7
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
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74LCX573 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
74LCX573_04 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
74LCX573_08 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs
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