參數(shù)資料
型號(hào): 74LCX374SJX
廠商: Fairchild Semiconductor
文件頁數(shù): 1/15頁
文件大?。?/td> 0K
描述: IC FLIP FLOP OCT D LV 20SOP
標(biāo)準(zhǔn)包裝: 2,000
系列: 74LCX
功能: 標(biāo)準(zhǔn)
類型: D 型總線
輸出類型: 三態(tài)非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
頻率 - 時(shí)鐘: 150MHz
延遲時(shí)間 - 傳輸: 8.5ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 24mA,24mA
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
74LCX374
Lo
w
V
olta
g
e
Octal
D-T
ype
Flip-Flop
with
5V
T
olerant
Inputs
and
Outputs
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LCX374 Rev. 1.6.1
74LCX374
Low Voltage Octal D-Type Flip-Flop
with 5V Tolerant Inputs and Outputs
Features
5V tolerant inputs and outputs
2.3V–3.6V VCC specifications provided
8.5ns tPD max (VCC = 3.3V), 10A ICC max
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal(1)
±24mA output drive (VCC = 3.0V)
Latch-up performance exceeds JEDEC 78 conditions
ESD performance
– Human Body Model
> 2000V
– Machine Model
> 200V
Leadless DQFN package
Note:
1. To ensure the high impedance state during power up
or down, OE should be tied to VCC through a pull-up
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
General Description
The LCX374 consists of eight D-type flip-flops featuring
separate D-type inputs for each flip-flop and 3-STATE
outputs for bus-oriented applications. A buffered clock
(CP) and Output Enable (OE) are common to all flip-
flops. The LCX374 is designed for low voltage appli-
cations with capability of interfacing to a 5V signal
environment.
The LCX374 is fabricated with an advanced CMOS
technology to achieve high speed operation while main-
taining CMOS low power dissipation.
Ordering Information
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number
Package Description
74LCX374WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300"
Wide
74LCX374SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX374BQX(2)
MLP20B
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm
74LCX374MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm
Wide
74LCX374MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Implements proprietary noise/EMI reduction circuitry
December 2013
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