- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8232 > 74LCX16500G (Fairchild Semiconductor)TXRX 18BIT UNIV BUS LV 54FBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | 74LCX16500G |
| 廠商： | Fairchild Semiconductor |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | TXRX 18BIT UNIV BUS LV 54FBGA |
| 標(biāo)準(zhǔn)包裝： | 1,092 |
| 系列： | 74LCX |
| 邏輯類型： | 通用總線收發(fā)器 |
| 電路數(shù)： | 18 位 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 54-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 54-BGA |
| 包裝： | 托盤 |
www.fairchildsemi.com
2
74LCX16500
Connection Diagrams
Pin Assignment for SSOP and TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
FBGA Pin Assignments
Truth Table (Note 4)
Note 4: A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,
LEBA, and CLKBA.
Note 5: Output level before the indicated steady-state input conditions
were established.
Note 6: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was LOW before LEAB went LOW.
Functional Description
For A-to-B data flow, the LCX16500 operates in the trans-
parent mode when LEAB is HIGH. When LEAB is LOW,
the A data is latched if CLKAB is held at a HIGH or LOW
logic level. If LEAB is LOW, the A bus data is stored in the
latch/flip-flop on the HIGH-to-LOW transition of CLKAB.
Output-enable OEAB is active-HIGH. When OEAB is
HIGH, the outputs are active. When OEAB is LOW, the out-
puts are in the high impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active HIGH and OEBA is active
LOW).
Pin Names
Description
A1 - A18
Data Register A Inputs/3-STATE Outputs
B1 - B18
Data Register B Inputs/3-STATE Outputs
CLKAB, CLKBA Clock Pulse Inputs
LEAB, LEBA
Latch Enable Inputs
OEBA, OEBA
Output Enable Inputs
12
3
4
5
6
A
A2
A1
OEAB
GND
B1
B2
B
A4
A3
LEAB
CLKAB
B3
B4
C
A6
A5
VCC
B5
B6
D
A8
A7
GND
B7
B8
E
A10
A9
GND
B9
B10
F
A12
A11
GND
B11
B12
G
A14
A13
VCC
B13
B14
H
A16
A15
OEBA CLKBA
B15
B16
J
A17
A18
LEBA
GND
B18
B17
Inputs
Output
OEAB
LEAB
CLKAB
An
Bn
LX
X
Z
HH
X
L
HH
X
H
HL
↓
LL
HL
↓
HH
HL
H
X
B0 (Note 5)
HL
L
X
B0 (Note 6)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-232-MU | CONVERTER MOD DC/DC 15V 200W |
| MC74LCX125DTG | IC BUFF TRI-ST QD CMOS 14TSSOP |
| VI-23V-MU | CONVERTER MOD DC/DC 5.8V 200W |
| 74LCX125MTC | IC BUFFER QUAD LV N-INV 14TSSOP |
| MC74LCX244DTG | IC BUFF/DVR TRI-ST DUAL 20TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LCX16500GX | 功能描述:總線收發(fā)器 UB Transceiver LV 18Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX16500MEA | 功能描述:總線收發(fā)器 18-Bit Univ Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX16500MEA_Q | 功能描述:總線收發(fā)器 18-Bit Univ Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX16500MEAX | 功能描述:總線收發(fā)器 18-Bit Univ Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LCX16500MTD | 功能描述:總線收發(fā)器 18-Bit Univ Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。