參數(shù)資料
型號: 74LCX07TTR
廠商: 意法半導(dǎo)體
英文描述: LOW VOLTAGE CMOS HEX BUFFER (OPEN DRAIN) WITH 5V TOLERANT INPUTS
中文描述: 低電壓CMOS六角緩沖區(qū)(開漏)與5V容限輸入
文件頁數(shù): 4/11頁
文件大?。?/td> 193K
代理商: 74LCX07TTR
74LCX07
4/11
Table 8: AC Electrical Characteristics
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
Table 9: Capacitive Characteristics
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/6 (per gate)
Figure 3: Test Circuit
C
L
= 50 pF or equivalent (includes jig and probe capacitance)
R
L
= R1 = 500
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
R
L
(
)
t
s
=
t
r
(ns)
-40 to 85 °C
-55 to 125 °C
Min.
Max.
Min.
Max.
t
PLZ
Propagation Delay
Time
2.7
50
500
2.5
7.0
5.2
7.0
5.2
1.0
7.0
5.2
7.0
5.2
1.0
ns
3.0 to 3.6
2.7
3.0 to 3.6
3.0 to 3.6
1.0
1.0
t
PZL
Propagation Delay
Time
50
500
2.5
ns
1.0
1.0
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
50
500
2.5
ns
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25 °C
Min.
Typ.
Max.
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
(note 1)
3.3
3.3
3.3
V
IN
= 0 to V
CC
V
IN
= 0 to V
CC
f
IN
= 10MHz
V
IN
= 0 or V
CC
6
14
4.3
pF
pF
pF
TEST
SWITCH
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
Open
6V
GND
相關(guān)PDF資料
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74LCX07 LOW VOLTAGE CMOS HEX BUFFER (OPEN DRAIN) WITH 5V TOLERANT INPUTS
74LCX07 Low Voltage Hex Buffer with Open Drain Outputs
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