參數(shù)資料
型號(hào): 74HCT9046A
廠商: NXP Semiconductors N.V.
英文描述: PLL with bandgap controlled VCO
中文描述: 鎖相環(huán)控制VCO的帶隙
文件頁(yè)數(shù): 2/40頁(yè)
文件大小: 240K
代理商: 74HCT9046A
1999 Jan 11
2
Philips Semiconductors
Product specification
PLL with bandgap controlled VCO
74HCT9046A
FEATURES
Low power consumption
Centre frequency up to
17 MHz (typ.) at V
CC
= 5.5 V
Choice of two phase
comparators
(1)
:
– EXCLUSIVE-OR (PC1)
– Edge-triggered JK flip-flop (PC2)
No dead zone of PC2
Charge pump output on PC2,
whose current is set by an external
resistor R
b
Centre frequency tolerance
±
10%
Excellent
voltage-controlled-oscillator (VCO)
linearity
Low frequency drift with supply
voltage and temperature variations
On chip bandgap reference
Glitch free operation of VCO, even
at very low frequencies
Inhibit control for ON/OFF keying
and for low standby power
consumption
Operation power supply voltage
range 4.5 to 5.5 V
Zero voltage offset due to op-amp
buffering
Output capability: standard
I
CC
category: MSI.
APPLICATIONS
FM modulation and demodulation
where a small centre frequency
tolerance is essential
Frequency synthesis and
multiplication where a low jitter is
required (e.g. Video
picture-in-picture)
Frequency discrimination
(1) R
b
connected between pin 15 and
ground: PC2 mode, with PCP
OUT
at
pin 2.
Pin 15 left open or connected to V
CC
:
PC1 mode with PC1
OUT
at pin 2.
Tone decoding
Data synchronization and
conditioning
Voltage-to-frequency conversion
Motor-speed control.
GENERAL DESCRIPTION
The 74HCT9046A is a high-speed
Si-gate CMOS device. It is specified
in compliance with “JEDEC standard
no. 7A”
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
6 ns.
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
a) P
D
= C
PD
×
V
CC2
×
f
i
+
Σ
(C
L
×
V
CC2
×
f
o
) where:
b) f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
Applies to the phase comparator section only (inhibit = HIGH). For power
dissipation of the VCO and demodulator sections see Figs 26 to 28.
2.
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
TYP.
UNIT
f
c
VCO centre frequency
C1 = 40 pF;
R1 = 3 k
;
V
CC
= 5 V
16
MHz
C
I
C
PD
input capacitance
power dissipation
capacitance per
package
3.5
20
pF
pF
notes 1 and 2
EXTENDED
TYPE NUMBER
PACKAGE
PINS
PIN POSITION
MATERIAL
CODE
74HCT9046AN
74HCT9046AD
16
16
DIL16
SO16
plastic
plastic
SOT38Z
SOT109A
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74HCT9046AD 功能描述:鎖相環(huán) - PLL PHASE LOCKED LOOP W/VCO RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
74HCT9046AD,112 功能描述:鎖相環(huán) - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
74HCT9046AD,118 功能描述:鎖相環(huán) - PLL PLL BAND GAP CNTRL W/VCO RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
74HCT9046AD-T 制造商:PHILIPS-SEMI 功能描述:
74HCT9046AN,112 功能描述:鎖相環(huán) - PLL PLL BAND GAP CNTRL W/VCO RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray