參數(shù)資料
型號(hào): 74HCT238PW,112
廠商: NXP Semiconductors
文件頁數(shù): 1/18頁
文件大?。?/td> 0K
描述: IC 3-8 LINE DECOD/DEMUX 16-TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 96
系列: 74HCT
類型: 解碼器/多路分解器
電路: 1 x 3:8
獨(dú)立電路: 1
電壓電源: 單電源
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 836 (CN2011-ZH PDF)
其它名稱: 568-2806-5
935189560112
1.
General description
74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible
with Low-Power Schottky TTL (LSTTL).
The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1,
A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (Y0 to Y7). The
74HC238/74HCT238 features three enable inputs: two active LOW (E1 and E2) and one
active HIGH (E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the “238” to a 1-to-32 (5
lines to 32 lines) decoder with just four “238” ICs and one inverter. The “238” can be used
as an eight output demultiplexer by using one of the active LOW enable inputs as the data
input and the remaining enable inputs as strobes. Unused enable inputs must be
permanently tied to their appropriate active HIGH or LOW state.
The 74HC238/74HCT238 is similar to the 74HC138/74HCT138 but has non-inverting
outputs.
2.
Features
I Demultiplexing capability
I Multiple input enable for easy expansion
I Ideal for memory chip select decoding
I Active HIGH mutually exclusive outputs
I Multiple package options
I Complies with JEDEC standard no. 7A
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Specied from 40 °Cto+85 °C and from 40 °C to +125 °C
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Rev. 03 — 16 July 2007
Product data sheet
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