參數(shù)資料
型號(hào): 74HCT193DB,118
廠商: NXP Semiconductors
文件頁數(shù): 26/30頁
文件大?。?/td> 0K
描述: IC COUNTER UP/DOWN SYNC 16SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 2,000
系列: 74HCT
邏輯類型: 二進(jìn)制計(jì)數(shù)器
方向: 上,下
元件數(shù): 1
每個(gè)元件的位元數(shù): 4
復(fù)位: 異步
計(jì)時(shí): 同步
計(jì)數(shù)速率: 43MHz
觸發(fā)器類型: 正邊沿
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOP
包裝: 帶卷 (TR)
其它名稱: 74HCT193DB-T
74HCT193DB-T-ND
935189730118
74HC_HCT193
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 24 June 2013
5 of 30
NXP Semiconductors
74HC193; 74HCT193
Presettable synchronous 4-bit binary up/down counter
5.
Pinning information
5.1 Pinning
5.2 Pin description
[1]
LOW-to-HIGH, edge triggered.
Fig 5.
Pin configuration SO16
Fig 6.
Pin configuration TSSOP16
and SSOP16
Fig 7.
Pin configuration DIP16
D1
VCC
Q1
D0
Q0
MR
CPD
TCD
CPU
TCU
Q2
PL
Q3
D2
GND
D3
001aag406
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
74HC193
74HCT193
74HC193
74HCT193
D1
VCC
Q1
D0
Q0
MR
CPD
TCD
CPU
TCU
Q2
PL
Q3
D2
GND
D3
001aag407
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
74HC193
74HCT193
D1
VCC
Q1
D0
Q0
MR
CPD
TCD
CPU
TCU
Q2
PL
Q3
D2
GND
D3
001aaf408
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Table 2.
Pin description
Symbol
Pin
Description
D0
15
data input 0
D1
1
data input 1
D2
10
data input 2
D3
9
data input 3
Q0
3
flip-flop output 0
Q1
2
flip-flop output 1
Q2
6
flip-flop output 2
Q3
7
flip-flop output 3
CPD
4
count down clock input[1]
CPU
5
count up clock input[1]
GND
8
ground (0 V)
PL
11
asynchronous parallel load input (active LOW)
TCU
12
terminal count up (carry) output (active LOW)
TCD
13
terminal count down (borrow) output (active LOW)
MR
14
asynchronous master reset input (active HIGH)
VCC
16
supply voltage
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