- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370131 > 74HC74 (ON SEMICONDUCTOR) Dual D Flip-Flop with Set and Reset(帶設(shè)置和復(fù)位的雙D觸發(fā)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | 74HC74 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Dual D Flip-Flop with Set and Reset(帶設(shè)置和復(fù)位的雙D觸發(fā)器) |
| 中文描述： | 雙D觸發(fā)器的設(shè)置和復(fù)位（帶設(shè)置和復(fù)位的雙?觸發(fā)器） |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 133K |
| 代理商： | 74HC74 |
Semiconductor Components Industries, LLC, 2007
February, 2007
Rev. 0
1
Publication Order Number:
74HC74/D
74HC74
Dual D FlipFlop with Set
and Reset
High
Performance Silicon
Gate CMOS
The 74HC74 is identical in pinout to the LS74. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
This device consists of two D flip
flops with individual Set, Reset,
and Clock inputs. Information at a D
input is transferred to the
corresponding Q output on the next positive going edge of the clock
input. Both Q and Q outputs are available from each flip
flop. The Set
and Reset inputs are asynchronous.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the JEDEC Standard No. 7A Requirements
ESD Performance: HBM 2000 V; Machine Model 200 V
Chip Complexity: 128 FETs or 32 Equivalent Gates
Pb
Free Packages are Available
http://onsemi.com
MARKING
DIAGRAMS
HC74
A
L, WL
Y
W, WW
G or
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb
Free Package
TSSOP
14
DT SUFFIX
CASE 948G
14
1
SOIC
14
D SUFFIX
CASE 751A
14
1
HC74G
AWLYWW
1
14
HC
74
ALYW
1
14
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74HC86A | Quad 2−Input Exclusive OR Gate High−Performance Silicon−Gate CMOS |
| 74HCT244A | Octal 3−State Noninverting Buffer/Line Driver/Line Receiver with LSTTL−Compatible Inputs |
| 74HCT245A | Octal 3−State Noninverting Bus Transceiver with LSTTL Compatible Inputs |
| 74I5SN | RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS |
| 74LCX2245 | Low-Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HC7403D | 功能描述:寄存器 4-BIT X64 WORD FIFO REG 3-ST RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74HC7403D,512 | 功能描述:寄存器 4-BIT X64 WORD FIFO RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74HC7403D,518 | 功能描述:寄存器 4-BIT X64 WORD FIFO RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74HC7403D-Q100,518 | 制造商:NXP Semiconductors 功能描述:FIFO Register Single 4-CH CMOS 16-Pin SO T/R 制造商:NXP Semiconductors 功能描述:74HC7403D-Q100/SO16/REEL13DP// - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FIFO REGISTER 4X64 3ST 16SOIC |
| 74HC7403D-T | 功能描述:寄存器 4-BIT X64 WORD FIFO REG 3-ST RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。