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參數(shù)資料
| 型號： | 74HC652D,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSCVR 3-ST 8BIT INV 24SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | 74HC |
| 邏輯類型： | 收發(fā)器，反相 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 8 |
| 輸出電流高，低： | 7.8mA，7.8mA |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SO |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 74HC652D-T 74HC652D-T-ND 935051190118 |
www.rohm.com
2012.10 - Rev.C
2011 ROHM Co., Ltd. All rights reserved.
Technical Note
6/8
BH3544F,BH3547F,BH3548F
●Application circuit
5
6
7
8
3
4
VCC
OUT2
BIAS
IN2
47
1
VIN2
90k
6dB
BIAS
MUTE
TSD
2
1
OUT1
MUTE
IN1
GND
1
VIN1
1
100k
330
10
VMUTE
H : Active
L : Mute
330
VCC
R5
C5
C6
C7
C8
C1
C2
C3
R3
R2
+
Fig. 15
●Description of external components
1) Input coupling capacitors (C3, C5)
These are determined according to the lower cutoff frequency fc. Moreover, since lowering the capacitance can cause
the occurrence of pop noise, when changing this, determine it after adequate checking.
Since the input impedance is 90k
, these are found by the expressions below, although drift, temperature
characteristics, and other considerations are necessary.
(Layered ceramic capacitors are recommended.)
C3(C5)=1/(2π× 90k
×fc)
2) Bias capacitor (C6)
When VCC=5V, 47
μF is recommended. Since lowering the capacitance too much can cause worsening of electrical
characteristics or the occurrence of pop noise, when changing this, determine it after checking this adequately.
3) Mute pin pop noise countermeasures (R2, C2)
Since BH3544F,BH3548F have an impedance of 190k
against GND and the BH3547F has 200k, it may be
impossible to cancel mute mode if R2 is made too large.
4) Output coupling capacitors (C1, C7)
These are determined by the lower cutoff frequency.
If RL is the output load resistance (assuming a resistance RX is
put in for output protection or current restriction), these are found by the expression below.
C1(C7)=1/(2π×(RL+Rｘ)× fc)
5) Input gain adjustment resistances (R3, R5)
Externally attached resistances (R3, R5) make input gain adjustment possible.
The gain found by the expression
below can be set.
GVC=6+20log(90k
/(90k+R3[R5])) [dB]
When input gain is not accommodated, these resistors have no use.
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| 74HC652DB | 功能描述:總線收發(fā)器 OCTAL XCVR/REG STOR 3-STATE RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74HC652DB,112 | 功能描述:總線收發(fā)器 OCTAL XCVR/REG STOR RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74HC652DB,118 | 功能描述:總線收發(fā)器 OCTAL XCVR/REG STOR RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74HC652DB-T | 功能描述:總線收發(fā)器 OCTAL XCVR/REG STOR 3-STATE RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74HC652D-T | 功能描述:總線收發(fā)器 OCTAL XCVR/REG STOR 3-STATE RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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