參數(shù)資料
型號(hào): 74HC4538A
廠商: Motorola, Inc.
元件分類: 參考電壓二極管
英文描述: Low Current Operation at 250 ,Low Reverse Leakage,Low Noise Zener Diode
中文描述: 250 的低電流運(yùn)算,低反向泄露,低噪聲穩(wěn)壓二極管
文件頁數(shù): 10/13頁
文件大小: 368K
代理商: 74HC4538A
MC54/74HC4538A
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
3–10
When Cx charges up to the reference voltage of the upper
reference circuit (#17), the output of the upper reference cir-
cuit goes low (#18). This causes the output latch to toggle,
taking the Q output of the HC4538A to a low state (#19), and
completing the time–out cycle.
POWER–DOWN CONSIDERATIONS
Large values of Cx may cause problems when powering
down the HC4538A because of the amount of energy stored
in the capacitor. When a system containing this device is
powered down, the capacitor may discharge from VCC
through the input protection diodes at pin 2 or pin 14. Current
through the protection diodes must be limited to 30 mA;
therefore, the turn–off time of the VCC power supply must not
be faster than t = VCCCx/(30 mA). For example, if
VCC = 5.0 V and Cx = 15
μ
F, the VCC supply must turn off no
faster than t = (5.0 V) (15
μ
F)/30 mA = 2.5 ms. This is usually
not a problem because power supplies are heavily filtered
and cannot discharge at this rate.
When a more rapid decrease of VCC to zero volts occurs,
the HC4538A may sustain damage. To avoid this possibility,
use an external damping diode, Dx, connected as shown in
Figure 11. Best results can be achieved if diode Dx is chosen
to be a germanium or Schottky type diode able to withstand
large current surges.
RESET AND POWER ON RESET OPERATION
A low voltage applied to the Reset pin always forces the Q
output of the HC4538A to a low state.
The timing diagram illustrates the case in which reset oc-
curs (#20) while Cx is charging up toward the reference volt-
age of the upper reference circuit (#21). When a reset
occurs, the output of the reset latch goes low (#22), turning
on transistor M1. Thus Cx is allowed to quickly charge up to
VCC (#23) to await the next trigger signal.
On power up of the HC4538A the power–on reset circuit
will be high causing a reset condition. This will prevent the
trigger–control circuit from accepting a trigger input during
this state. The HC4538A’s Q outputs are low and the Q not
outputs are high.
RETRIGGER OPERATION
When used in the retriggerable mode (Figure 12), the
HC4538A may be retriggered during timing out of the output
pulse at any time after the trigger–control circuit flip–flop has
been reset (#24), and the voltage across Cx is above the low-
er reference voltage. As long as the Cx voltage is below the
lower reference voltage, the reset of the flip–flop is high, dis-
abling any trigger pulse. This prevents M3 from turning on
during this period resulting in an output pulse width that is
predictable.
The amount of undershoot voltage on RxCx during the
trigger mode is a function of loop delay, M3 conductivity, and
VDD. Minimum retrigger time, trr (Figure 7), is a function of
1) time to discharge RxCx from VDD to lower reference
voltage (Tdischarge); 2) oop delay (Tdelay); 3) time to charge
RxCx from the undershoot voltage back to the lower refer-
ence voltage (Tcharge).
Figure 13 shows the device configured in the non–retrig-
gerable mode.
An Application Note (AN1558/D) titled
Characterization of
Retrigger Time in the HC4538A Dual Precision Monstable
Multivibrator
is being prepared. Please consult the factory for
its availability.
DX
CX
VCC
Q
Q
RESET
A
B
Figure 11. Discharge Protection During Power Down
RX
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