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參數(shù)資料
| 型號： | 74HC4520N,652 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 6/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DUAL 4BIT SYNC BINARY 16-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 系列： | 74HC |
| 邏輯類型： | 二進(jìn)制計數(shù)器 |
| 方向： | 上 |
| 元件數(shù)： | 2 |
| 每個元件的位元數(shù)： | 4 |
| 復(fù)位： | 異步 |
| 計時： | 同步 |
| 計數(shù)速率： | 69MHz |
| 觸發(fā)器類型： | 正，負(fù) |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-DIP |
| 包裝： | 管件 |
| 其它名稱： | 74HC4520N 74HC4520N-ND 933669830652 |
74LVCH322244A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 16 December 2011
6 of 14
NXP Semiconductors
74LVCH322244A
32-bit buffer/line driver; 30
resistors; 5 V tolerance; 3-state
[1]
All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25 C.
[2]
The bus hold circuit is switched off when VI > VCC, allowing 5.5 V on the input terminal.
[3]
Valid for data inputs only. Note that control inputs do not have a bus hold circuit.
[4]
The specified sustaining current at the data input holds the input below the specified VI level.
[5]
The specified overdrive current at the data input forces the data input to the opposite logic input state.
10. Dynamic characteristics
IBHH
bus hold HIGH
current
VCC = 1.65 V; VI = 1.07 V
10
-
10
-
A
VCC = 2.3 V; VI = 1.7 V
30
-
25
-
A
VCC = 3.0 V; VI = 2.0 V
75
-
60
-
A
IBHLO
bus hold LOW
overdrive
current
VCC = 1.95 V
200
-
200
-
A
VCC = 2.7 V
300
-
300
-
A
VCC = 3.6 V
500
-
500
-
A
IBHHO
bus hold HIGH
overdrive
current
VCC = 1.95 V
200
-
200
-
A
VCC = 2.7 V
300
-
300
-
A
VCC = 3.6 V
500
-
500
-
A
Table 6.
Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation
delay
nAntonYn; see Figure 4
VCC = 1.2 V
-
11.0
-
ns
VCC = 1.65 V to 1.95 V
1.5
6.0
15.0
1.5
17.2
ns
VCC = 2.3 V to 2.7 V
1.0
3.2
7.4
1.0
8.2
ns
VCC = 2.7 V
1.0
3.3
6.7
1.0
8.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.7
5.8
1.0
7.5
ns
ten
enable time
nOE to nYn; see Figure 5
VCC = 1.2 V
-
15.0
-
ns
VCC = 1.65 V to 1.95 V
1.7
6.8
15.3
1.7
17.7
ns
VCC = 2.3 V to 2.7 V
1.5
3.8
8.0
1.5
8.9
ns
VCC = 2.7 V
1.5
4.2
7.6
1.5
9.5
ns
VCC = 3.0 V to 3.6 V
1.0
3.1
6.0
1.0
7.5
ns
tdis
disable time
nOE to nYn; see Figure 5
VCC = 1.2 V
-
10.0
-
ns
VCC = 1.65 V to 1.95 V
2.2
3.9
8.2
2.2
9.5
ns
VCC = 2.3 V to 2.7 V
0.5
2.1
4.4
0.5
5.0
ns
VCC = 2.7 V
1.5
3.1
4.7
1.5
6.0
ns
VCC = 3.0 V to 3.6 V
1.5
2.8
4.5
1.5
6.0
ns
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