參數(shù)資料
型號： 74HC4516D
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Binary up/down counter
中文描述： HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16
文件頁數(shù)： 11/14頁
文件大小： 100K
代理商： 74HC4516D
December 1990
11
Philips Semiconductors
Product specification
Binary up/down counter
74HC/HCT4516
AC WAVEFORMS
Fig.7
Waveforms showing the clock (CP) to
output (Q
n
) and terminal count (TC)
propagation delays, the clock pulse width
and the maximum clock pulse frequency.
(1)
HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.8
Waveforms showing the set-up and hold
times form count enable (CE) and up/down
(UP/DN) control inputs to the clock pulse
(CP), the propagation delays from UP/DN,
CE to TC.
(1)
HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.9
Waveforms showing the preset enable
pulse width, preset enable to output
delays and output transition times.
(1)
HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.10 Waveforms showing the master reset pulse,
master reset to terminal count and Q
n
delay and master reset to clock removal
time.
(1)
HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
相關(guān)PDF資料
PDF描述
74HC4516DB Binary up/down counter
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