參數(shù)資料
型號(hào): 74HC4059DB,112
廠商: NXP Semiconductors
文件頁數(shù): 3/20頁
文件大?。?/td> 0K
描述: IC PROG DIV-BY-N COUNTER 24-SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 59
系列: 74HC
邏輯類型: 除以 N
方向:
元件數(shù): 1
每個(gè)元件的位元數(shù): 16
復(fù)位: 異步
計(jì)時(shí): 同步
計(jì)數(shù)速率: 43MHz
觸發(fā)器類型: 正邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 24-SSOP
包裝: 管件
其它名稱: 568-2696-5
935190010112
1998 Jul 08
11
Philips Semiconductors
Product specication
Programmable divide-by-n counter
74HC/HCT4059
AC WAVEFORMS
Fig.7
Waveforms showing the clock (CP) to output (Q) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency.
(1)
HC: VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.8 Waveforms showing the LE input to Q output propagation delay.
(1)
HC: VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.9
Waveforms showing the Kb or Kc removal times, when the operating mode is switched from master preset
to any other mode.
(1)
HC: VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
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