參數(shù)資料
型號: 74HC4016J
廠商: National Semiconductor Corporation
英文描述: Quad Analog Switch
中文描述: 四路模擬開關
文件頁數(shù): 2/11頁
文件大?。?/td> 349K
代理商: 74HC4016J
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
(Plastic DIP or SOIC Package)
260
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Control Inputs (Figure 10)
0
500
be drawn; i.e., the current out of the switch may contain both VCC and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
VCC = 4.5 V
DC ELECTRICAL CHARACTERISTICS
Digital Section (Voltages Referenced to GND)
V
Guaranteed Limit
VCC
– 55 to
25 C
9.0
6.3
6.3
6.3
9.0
1.8
1.8
1.8
Current (per Package)
VIO = 0 V
12.0
8
160
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
80
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
VCC.
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