參數(shù)資料
型號(hào): 74HC40103DB,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 8/25頁(yè)
文件大小: 0K
描述: IC 8BIT SYNC BINARY DOWN 16-SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 78
系列: 74HC
邏輯類型: 二進(jìn)制計(jì)數(shù)器
方向:
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
復(fù)位: 異步
計(jì)時(shí): 同步
計(jì)數(shù)速率: 32MHz
觸發(fā)器類型: 正邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOP
包裝: 管件
其它名稱: 568-2677-5
935189340112
9397 750 13812
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 12 November 2004
16 of 25
Philips Semiconductors
74HC40103
8-bit synchronous binary down counter
13. Waveforms
VM = 0.5 × VI.VM = 0.5 × VI.
Fig 7.
Waveforms showing the clock input (CP) to
TC propagation delays, the clock pulse width,
the output transition times and the maximum
clock pulse frequency
Fig 8.
Waveforms showing the TE to TC propagation
delays
001aab926
CP input
TC output
VM
tPHL
tTHL
tTLH
tPLH
VM
tW
1/fmax
001aab927
TE input
TC output
VM
tPHL
tTHL
tTLH
tPLH
VM
VM = 0.5 × VI.VM = 0.5 × VI.
Fig 9.
Waveforms showing PL, MR,Pnto TC
propagation delays
Fig 10. Waveforms showing removal time for MR and
PL
001aab928
Pn, PL, MR
input
TC output
VM
tPHL
tPLH
VM
tW
001aab929
PL, MR
input
CP input
VM
trem
VM
tW
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