參數(shù)資料
型號(hào): 74HC366DB
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Hex buffer/line driver; 3-state; inverting
中文描述: HC/UH SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16
文件頁(yè)數(shù): 2/7頁(yè)
文件大?。?/td> 46K
代理商: 74HC366DB
December 1990
2
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT366
FEATURES
Inverting outputs
Output capability: bus driver
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT366 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT366 are hex inverting buffer/line drivers
with 3-state outputs. The 3-state outputs (nY) are
controlled by the output enable inputs (OE
1
, OE
2
).
A HIGH on OE
n
causes the outputs to assume a high
impedance OFF-state.
The ”366” is identical to the “365” but has inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
propagation delay
nA to nY
input capacitance
power dissipation capacitance per buffer
C
L
= 15 pF; V
CC
= 5 V
10
11
ns
C
I
C
PD
3.5
30
3.5
30
pF
pF
notes 1 and 2
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