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參數(shù)資料
| 型號(hào)： | 74HC273PW,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 21/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OCTAL D F-F POS-EDGE 20-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | 74HC |
| 功能： | 主復(fù)位 |
| 類型： | D 型總線 |
| 輸出類型： | 非反相 |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 8 |
| 頻率 - 時(shí)鐘： | 122MHz |
| 延遲時(shí)間 - 傳輸： | 13ns |
| 觸發(fā)器類型： | 正邊沿 |
| 輸出電流高，低： | 5.2mA，5.2mA |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 包裝： | 帶卷 (TR) |
74HC_HCT273
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 10 June 2013
9 of 21
NXP Semiconductors
74HC273; 74HCT273
Octal D-type flip-flop with reset; positive-edge trigger
[1]
tpd is the same as tPHL and tPLH.
[2]
tt is the same as tTHL and tTLH.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
(C
L VCC
2
f
o) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
74HCT273
tpd
propagation
delay
CP to Qn; see Figure 7
VCC = 4.5 V
-
16
30
-
38
-
45
ns
VCC = 5.0 V; CL =15pF
-
15
-
ns
tPHL
HIGH to LOW
propagation
delay
MR to Qn; see Figure 8
VCC = 4.5 V
-
23
34
-
43
-
51
ns
VCC = 5.0 V; CL =15pF
-
20
-
ns
tt
transition time
Qn output; see Figure 7
VCC = 4.5 V
-
7
15
-
19
-
22
ns
tW
pulse width
CP input; see Figure 7
VCC = 4.5 V
16
9
-
20
-
24
-
ns
MR input LOW;
see Figure 8
VCC = 4.5 V
16
8
-
20
-
24
-
ns
trec
recovery time
MR to CP; see Figure 8
VCC = 4.5 V
10
2
-
13
-
15
-
ns
tsu
set-up time
Dn to CP; see Figure 9
VCC = 4.5 V
12
5
-
15
-
18
-
ns
th
hold time
Dn to CP; see Figure 9
VCC = 4.5 V
3
4-
3
-
3
-
ns
fmax
maximum
frequency
CP input; see Figure 7
VCC = 4.5 V
30
56
-
24
-
20
-
MHz
VCC = 5.0 V; CL =15pF
-
36
-
MHz
CPD
power
dissipation
capacitance
per package;
VI =GND to VCC 1.5 V
-23-
-
pF
Table 7.
Dynamic characteristics …continued
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10
Symbol Parameter
Conditions
25
C
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
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