參數(shù)資料
型號(hào): 74HC191PW,118
廠商: NXP Semiconductors
文件頁(yè)數(shù): 6/14頁(yè)
文件大?。?/td> 0K
描述: IC 4BIT BINARY UP/DN CNT 16TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 2,500
系列: 74HC
邏輯類型: 二進(jìn)制計(jì)數(shù)器
方向: 上,下
元件數(shù): 1
每個(gè)元件的位元數(shù): 4
計(jì)時(shí): 同步
計(jì)數(shù)速率: 39MHz
觸發(fā)器類型: 正邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
其它名稱: 74HC191PW-T
74HC191PW-T-ND
935188370118
December 1990
14
Philips Semiconductors
Product specication
Presettable synchronous 4-bit binary
up/down counter
74HC/HCT191
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”.
Fig.16 Waveforms showing the set-up and hold times from the parallel load input (PL) to the data input (Dn).
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.17 Waveforms showing the set-up and hold times from the count enable and up/down inputs (CE, U/D) to the
clock (CP).
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT : VM = 1.3 V; VI = GND to 3 V.
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