參數(shù)資料
型號： 74HC190D-T
英文描述： SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits
中文描述： 異步加/減計(jì)數(shù)器
文件頁數(shù)： 6/16頁
文件大?。?/td> 78K
代理商： 74HC190D-T
2002 May 15
6
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74HC1G126; 74HCT1G126
Family 74HCT1G
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Note
1.
All typical values are measured at T
amb
= 25
°
C.
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
(
°
C)
UNIT
OTHER
V
CC
(V)
40 to +85
40 to +125
MIN.
TYP.
(1)
MAX.
MIN.
MAX.
V
IH
HIGH-level input
voltage
LOW-level input
voltage
HIGH-level output
voltage
4.5 to 5.5
2.0
1.6
2.0
V
V
IL
4.5 to 5.5
1.2
0.8
0.8
V
V
OH
V
I
= V
IH
or V
IL
;
I
O
=
20
μ
A
V
I
= V
IH
or V
IL
;
I
O
=
6.0 mA
V
I
= V
IH
or V
IL
;
I
O
= 20
μ
A
V
I
= V
IH
or V
IL
;
I
O
= 6.0 mA
V
I
= V
CC
or GND
V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
V
I
= V
CC
or GND;
I
O
= 0
V
I
= V
CC
2.1 V;
I
O
= 0
4.5
4.4
4.5
4.4
V
4.5
3.84
4.32
3.7
V
V
OL
LOW-level output
voltage
4.5
0
0.1
0.1
V
4.5
0.16
0.33
0.4
V
I
LI
I
OZ
input leakage current
3-state output current
OFF-state
quiescent supply
current
additional supply
current per input
5.5
5.5
1.0
5
1.0
10
μ
A
μ
A
I
CC
5.5
10
20
μ
A
I
CC
4.5 to 5.5
500
850
μ
A
相關(guān)PDF資料
PDF描述
74HC191D-T SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits
74HC192D-T SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits
74HC193D-T Synchronous Up/Down Counter
74HC1G08GW-G Single 2-input AND Gate
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