- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370131 > 74HC132 (ON SEMICONDUCTOR) Quad 2-Input NAND Gate with Schmitt Trigger Inputs(帶施密特觸發(fā)器的四2輸入與非門) PDF資料下載
參數(shù)資料
| 型號(hào)： | 74HC132 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Quad 2-Input NAND Gate with Schmitt Trigger Inputs(帶施密特觸發(fā)器的四2輸入與非門) |
| 中文描述： | 四2輸入與非門的施密特觸發(fā)器輸入（帶施密特觸發(fā)器的四2輸入與非門） |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 134K |
| 代理商： | 74HC132 |
Semiconductor Components Industries, LLC, 2007
March, 2007
Rev. 1
1
Publication Order Number:
74HC132/D
74HC132
Quad 2Input NAND Gate
with SchmittTrigger Inputs
High
Performance Silicon
Gate CMOS
The 74HC132 is identical in pinout to the LS132. The device inputs
are compatible with standard CMOS outputs; with pull
up resistors,
they are compatible with LSTTL outputs.
The HC132 can be used to enhance noise immunity or to square up
slowly changing waveforms.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements as Defined by JEDEC
Standard No. 7A
ESD Performance: HBM 2000 V; Machine Model 200 V
Chip Complexity: 72 FETs or 18 Equivalent Gates
These are Pb
Free Devices
Figure 1. Pin Assignment
11
12
13
14
8
9
10
5
4
3
2
1
7
6
B3
Y4
A4
B4
V
CC
Y3
A3
A2
Y1
B1
A1
GND
Y2
B2
MARKING
DIAGRAMS
HC132 = Device Code
A
= Assembly Location
L, WL
= Wafer Lot
Y
= Year
W, WW = Work Week
G or
= Pb
Free Package
(Note: Microdot may be in either location)
SOIC
14
D SUFFIX
CASE 751A
HC132G
AWLYWW
TSSOP
14
DT SUFFIX
CASE 948G
HC
132
ALYW
1
14
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
Inputs
Output
Y
H
H
H
L
A
L
L
H
H
B
L
H
L
H
FUNCTION TABLE
1
14
http://onsemi.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74HC14A | Hex Schmitt−Trigger Inverter High−Performance Silicon−Gate CMOS |
| 74HC32A | Quad 2−Input OR Gate High−Performance Silicon−Gate CMOS |
| 74HC367A | Telecomm/Datacomm |
| 74HC74DG | Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS |
| 74HC74DR2 | Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HC132AFN | 制造商:Toshiba America Electronic Components 功能描述: |
| 74HC132AN | 制造商:AVX Corporation 功能描述: |
| 74HC132D | 功能描述:邏輯門 QUAD 2-IN NAND GATE SCHMITT TRIGGER RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74HC132D(BJ) | 功能描述:NAND Gate IC 4 Channel Schmitt Trigger 14-SOIC 制造商:toshiba semiconductor and storage 系列:74HC 包裝:剪切帶（CT） 零件狀態(tài):在售 邏輯類型:與非門 電路數(shù):4 輸入數(shù):2 特性:施密特觸發(fā)器 電壓 - 電源:2 V ~ 6 V 電流 - 靜態(tài)（最大值）:1μA 電流 - 輸出高，低:5.2mA，5.2mA 邏輯電平 - 低:- 邏輯電平 - 高:- 不同 V，最大 CL 時(shí)的最大傳播延遲:19ns @ 5V，50pF 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 供應(yīng)商器件封裝:14-SOIC 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 標(biāo)準(zhǔn)包裝:1 |
| 74HC132D,652 | 功能描述:邏輯門 QUAD 2-IN NAND GATE RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。