參數(shù)資料
型號(hào): 74GTLP22034DGGRE4
廠商: Texas Instruments, Inc.
英文描述: 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH
中文描述: 8位LVTTL至GTLP可調(diào)EDGE的速率收發(fā)器劈開登記LVTTL港口及反饋路徑
文件頁數(shù): 4/20頁
文件大?。?/td> 366K
代理商: 74GTLP22034DGGRE4
SN74GTLP22034
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER
WITH SPLIT LVTTL PORT AND FEEDBACK PATH
SCES355C
JUNE 2001
REVISED SEPTEMBER 2001
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Function Tables
FUNCTION/MODE
INPUTS
OMODE0
X
OUTPUT
MODE
OEBA
L
OEAB
L
OEAB
X
OMODE1
X
IMODE1
X
IMODE0
X
LOOPBACK
X
Z
Isolation
L
X
H
X
X
X
X
X
X
H
L
L
L
X
X
X
Buffer
X
H
L
L
H
X
X
X
AI to B
Flip-flop
X
H
L
H
X
X
X
X
Latch
H
L
X
X
X
L
L
L
B t AO
B to AO
B ff
Buffer
H
X
H
X
X
L
L
L
H
L
X
X
X
L
H
L
B t AO
B to AO
Fli fl
Flip-flop
H
X
H
X
X
L
H
L
H
L
X
X
X
H
X
L
B t AO
B to AO
L t h
Latch
H
X
H
X
X
H
X
L
H
L
X
X
X
L
L
H
AI to AO
Buffer
H
X
H
X
X
L
L
H
H
L
X
X
X
L
H
H
AI to AO
Flip flop
Flip-flop
H
X
H
X
X
L
H
H
H
L
X
X
X
H
X
H
AI to AO
Latch
H
X
H
X
X
H
X
H
H
H
L
X
X
X
X
L
AI to B, B to AO
Transparent with
feedback path
ENABLE/DISABLE
INPUTS
OUTPUTS
OEBA
OEAB
OEAB
AO
B
L
X
X
Z
H
X
X
Active
X
L
L
Z
X
L
H
Z
X
H
L
Active
X
H
H
Z
BUFFER
INPUT
OUTPUT
L
L
H
H
LATCH
INPUTS
OUTPUT
CLK/LE
H
DATA
L
L
H
H
H
L
X
Q0
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