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參數(shù)資料
| 型號(hào)： | 74FST3126QSR |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Bus Switch |
| 中文描述： | CBT/FST/QS/5C/B SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO16 |
| 封裝： | QSOP-16 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 80K |
| 代理商： | 74FST3126QSR |
74FST3126
http://onsemi.com
3
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage
0.5 to
7.0
V
V
I
DC Input Voltage
0.5 to
7.0
V
V
O
DC Output Voltage
0.5 to
7.0
V
I
IK
DC Input Diode Current
V
I
GND
50
mA
I
OK
DC Output Diode Current
V
O
GND
50
mA
I
O
DC Output Sink Current
128
mA
I
CC
DC Supply Current per Supply Pin
100
mA
I
GND
DC Ground Current per Ground Pin
100
mA
T
STG
Storage Temperature Range
65 to
150
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
260
C
T
J
Junction Temperature Under Bias
150
C
JA
Thermal Resistance (Note 1)
SOIC
TSSOP
QSOP
125
170
200
C/W
MSL
Moisture Sensitivity
Level 1
F
R
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V–0 @ 0.125 in
V
ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
2000
200
V
I
LATCH–UP
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm–by–1 inch, 2–ounce copper trace with no air flow.
2. Tested to EIA/JESD22–A114–A.
3. Tested to EIA/JESD22–A115–A.
4. Tested to EIA/JESD78.
Latch–Up Performance
Above V
CC
and Below GND at 85 C (Note 4)
500
mA
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
Supply Voltage
Operating, Data Retention Only
4.0
5.5
V
V
I
Input Voltage
(Note 5)
0
5.5
V
V
O
Output Voltage
(HIGH or LOW State)
0
V
CC
V
T
A
Operating Free–Air Temperature
40
85
C
t/ V
Input Transition Rise or Fall Rate
Switch Control Input
Switch I/O
0
0
5
DC
ns/V
5. Unused control inputs may not be left open. All control inputs must be tied to a high or low logic input voltage level.
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