參數(shù)資料
型號: 74FCT273PMQB
廠商: National Semiconductor Corporation
英文描述: Octal D Flip-Flop
中文描述: 八路D觸發(fā)器
文件頁數(shù): 4/8頁
文件大小: 168K
代理商: 74FCT273PMQB
DC Characteristics for ’FCT Family Devices
(Continued)
Typical values are at V
CC
e
5.0V, 25
§
C ambient and maximum loading. For test conditions shown as Max, use the value
specified for the appropriate device type: Com: V
CC
e
5.0V
g
5%, T
A
e
0
§
C to
a
70
§
C; Mil: V
CC
e
5.0V
g
10%, T
A
e b
55
§
C
to
a
125
§
C, V
HC
e
V
CC
b
0.2V
Symbol
Parameter
54FCT/74FCT
Units
Conditions
Min
Typ
Max
V
OL
Maximum Low Level
Output Voltage
GND
0.2
V
V
CC
e
3V; V
IN
e
0.2V or V
HC
;
I
OL
e
300
m
A
GND
0.3
0.3
0.2
0.5
0.5
V
CC
e
Min
V
IN
e
V
IH
or V
IL
I
OL
e
300
m
A
I
OL
e
48 mA (Mil)
I
OL
e
32 mA (Com)
I
CC
Maximum Quiescent
Supply Current
V
CC
e
Max
V
IN
t
V
HC
, V
IN
s
0.2V
f
I
e
0
1.0
40.0
m
A
D
I
CC
Quiescent Supply Current;
TTL Inputs HIGH
0.5
2.0
mA
V
CC
e
Max
V
IN
e
3.4V (Note 3)
I
CCD
Dynamic Power
Supply Current (Note 4)
V
CC
Max
Outputs Open
MR
e
V
CC
One Input Toggling
50% Duty Cycle
V
IN
t
V
HC
V
IN
s
0.2V
0.25
0.40
mA/MHz
V
H
Input Hysteresis
on Clock Only
200
mV
I
C
Total Power
Supply Current (Note 6)
V
CC
e
Max
Outputs Open
MR
e
V
CC
V
IN
t
V
HC
V
IN
s
0.2V
1.5
4.0
f
I
e
10 MHz
One Bit Toggling
50% Duty Cycle
V
IN
e
3.4V
V
IN
e
GND
1.8
6.0
mA
(Note 5)
V
CC
e
Max
Outputs Open
MR
e
V
CC
V
IN
t
V
HC
V
IN
s
0.2V
3.0
7.8
f
I
e
2.5 MHz
Eight Bits Toggling
50% Duty Cycle
V
IN
e
3.4V
V
IN
e
GND
5.0
16.8
V
H
Input Hysteresis on Clock Only
200
mV
Note 1:
Maximum test duration not to exceed one second, not more than one output shorted at one time.
Note 2:
This parameter guaranteed but not tested.
Note 3:
Per TTL driven input (V
IN
e
3.4V); all other inputs at V
CC
or GND.
Note 4:
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
Note 5:
Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
Note 6:
I
C
e
I
QUIESCENT
a
I
INPUTS
a
I
DYNAMIC
I
C
e
I
CC
a
D
I
CC
D
H
N
T
a
I
CCD
(f
CP
/2
a
f
I
N
I
)
I
CC
e
Quiescent Current
D
I
CC
e
Power Supply Curent for a TTL High Input (V
IN
e
3.4V)
D
H
e
Duty Cycle for TTL inputs High
N
T
e
Number of Inputs at D
H
I
CCD
e
Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
e
Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
e
Input Frequency
N
I
e
Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
4
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