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參數(shù)資料
| 型號(hào)： | 74F74 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Dual D-Type Positive Edge-Triggered Flip-Flop |
| 中文描述： | 雙D型上升沿觸發(fā)器 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 80K |
| 代理商： | 74F74 |
Philips Semiconductors
Product specification
74F74
Dual D-type flip-flop
2
1996 Mar 12
853 0335 16554
FEATURE
Industrial temperature range available (–40
°
C to +85
°
C)
DESCRIPTION
The 74F74 is a dual positive edge-triggered D-type flip-flop featuring
individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (SD) and reset (RD) are asynchronous
active low inputs and operate independently of the clock input. When
set and reset are inactive (high), data at the D input is transferred to
the Q and Q outputs on the low-to-high transition of the clock. Data
must be stable just one setup time prior to the low-to-high transition of
the clock for predictable operation. Clock triggering occurs at a
voltage level and is not directly related to the transition time of the
positive-going pulse. Following the hold time interval, data at the D
input may be changed without affecting the levels of the output.
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
SD1
Q1
Q1
CP1
RD1
D1
RD0
D0
Q0
CP0
SD0
Q0
SF00045
TYPE
TYPICAL f
max
125MHz
TYPICAL SUPPLY CURRENT (TOTAL)
74F74
11.5mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
N74F74N
INDUSTRIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= –40
°
C to +85
°
C
I74F74N
PKG. DWG. #
14-pin plastic DIP
SOT27-1
14-pin plastic SO
N74F74D
I74F74D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
20
μ
A/0.6mA
20
μ
A/0.6mA
20
μ
A/1.8mA
20
μ
A/1.8mA
1.0mA/20mA
D0, D1
Data inputs
1.0/1.0
CP0, CP1
Clock inputs (active rising edge)
1.0/1.0
SD0, SD1
Set inputs (active low)
1.0/3.0
RD0, RD1
Reset inputs (active low)
1.0/3.0
Q0, Q1, Q0, Q1
NOTE:
One (1.0) FAST unit load is defined as: 20
μ
A in the high state and 0.6mA in the low state.
Data outputs
50/33
LOGIC SYMBOL
Q0 Q0 Q1 Q1
5
6
9
8
V
= Pin 14
GND = Pin 7
3
4
1
11
10
13
CP0
SD0
RD0
CP1
SD1
RD1
D0
D1
2
12
SF00046
IEC/IEEE SYMBOL
4
3
2
1
10
11
12
13
5
6
9
8
&
S
S
C1
C2
R
1D
2D
R
SF00047
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F74PC | Dual D-Type Positive Edge-Triggered Flip-Flop |
| 74F74SC | Dual D-Type Positive Edge-Triggered Flip-Flop |
| 74F74SJ | Dual D-Type Positive Edge-Triggered Flip-Flop |
| 74F74 | Dual D-Type Positive Edge-Triggered Flip-Flop |
| 74F74PC | Dual D-Type Positive Edge-Triggered Flip-Flop |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F74D | 制造商:NXP Semiconductors 功能描述:DUAL D-TYPE EDGE TRIGGER F/F 制造商:SIG 功能描述:74F74 制造商:Fairchild Semiconductor Corporation 功能描述:74F74DC 制造商:North American Philips Discrete Products Div 功能描述:74F74DC 制造商:NXP Semiconductors 功能描述:74F74DC 制造商:Texas Instruments 功能描述:74F74DC |
| 74F74DC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74F74LC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74F74N | 制造商:. 功能描述: 制造商:NXP Semiconductors 功能描述: 制造商:NXP Semiconductors 功能描述:Flip Flop, Dual, D Type, 14 Pin, Plastic, DIP |
| 74F74N 90 | 制造商:SIG 功能描述:74F74N |
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