參數(shù)資料
型號(hào): 74F64
廠商: National Semiconductor Corporation
英文描述: 4-2-3-2-Input AND-OR-Invert Gate
中文描述: 4 - 2 - 3 - 2 -輸入與或-反相門(mén)
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 72K
代理商: 74F64
Philips Semiconductors
Product specification
74F64
4-2-3-2-input AND-OR-invert gate
2
1996 Mar 14
853–0334 16574
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F64
4.0ns
2.5mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
PKG. DWG. #
14-pin plastic DIP
N74F64N
SOT27-1
14-pin plastic SO
N74F64D
SOT108-1
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
Dk
Dj
Q
Df
Dd
De
Dc
Da
Di
Db
Dg
Dh
SF00094
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
Dn
Data inputs
1.0/1.0
20
μ
A/0.6mA
Q
Data output
50/33
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20
μ
A in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
Q
8
3
1
13
12
11
4
5
6
V
= Pin 14
GND = Pin 7
SF00095
2
9
10
Da
Db
Dc
Dd
De
Df
Dg
Dh
Di
Dj
Dk
IEC/IEEE SYMBOL
SF00096
1
8
2
3
1
13
12
11
4
5
6
9
&
&
&
&
10
相關(guān)PDF資料
PDF描述
74F64PC 4-2-3-2-Input AND-OR-Invert Gate
74F64SC 4-2-3-2-Input AND-OR-Invert Gate
74F64 4-2-3-2-Input AND-OR-Invert Gate
74F64PC 4-2-3-2-Input AND-OR-Invert Gate
74F64SC 4-2-3-2-Input AND-OR-Invert Gate
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