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參數(shù)資料
| 型號： | 74F646LMX |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Octal Transceiver/Register with TRI-STATE Outputs |
| 中文描述： | 八路收發(fā)器/注冊的三態(tài)輸出 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 217K |
| 代理商： | 74F646LMX |
TL/F/9580
5
December 1994
54F/74F646
#
74F646B
#
54F/74F648
Octal Transceiver/Register with TRI-STATE
é
Outputs
General Description
These devices consist of bus transceiver circuits with TRI-
STATE, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the input bus
or from the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to a high logic level. Control G and direction pins are provid-
ed to control the transceiver function. In the transceiver
mode, data present at the high impedance port may be
stored in either the A or the B register or in both. The select
controls can multiplex stored and real-time (transparent
mode) data. The direction control determines which bus will
receive data when the enable control G is Active LOW. In
the isolation mode (control G HIGH), A data may be stored
in the B register and/or B data may be stored in the A regis-
ter.
Features
Y
Independent registers for A and B buses
Y
Multiplexed real-time and stored data
Y
’F648 has inverting data paths
Y
’F646/’F646B have non-inverting data paths
Y
’F646B is a faster version of the ’F646
Y
TRI-STATE outputs
Y
300 mil slim DIP
Y
Guaranteed 4000V minimum ESD protection
Commercial
Military
Package
Number
Package Description
74F646SPC
N24C
24-Lead (0.300
×
Wide) Molded Dual-In-Line
24-Lead (0.300
×
Wide) Ceramic Dual-In-Line
24-Lead (0.300
×
Wide) Molded Small Outline, JEDEC
54F646DM (Note 2)
J24F
74F646SC (Note 1)
M24B
74F646MSA (Note 1)
MSA24
24-Lead Molded Shrink Small Outline, EIAJ, Type II
54F646FM (Note 2)
W24C
24-Lead Cerpack
54F646LM (Note 2)
E28A
28-Lead Ceramic Leadless Chip Carrier, Type C
74F646BSPC
N24C
24-Lead (0.300
×
Wide) Molded Dual-In-Line
24-Lead (0.300
×
Wide) Molded Small Outline, JEDEC
24-Lead (0.300
×
Wide) Molded Dual-In-Line
24-Lead (0.300
×
Wide) Ceramic Dual-In-Line
24-Lead (0.300
×
Wide) Molded Small Outline, JEDEC
74F646BSC (Note 1)
M24B
74F648SPC
N24C
54F648SDM (Note 2)
J24F
74F648SC (Note 1)
M24B
54F648FM (Note 2)
W24C
24-Lead Cerpack
54F648LM (Note 2)
E28A
24-Lead Ceramic Leadless Chip Carrier, Type C
Note 1:
Devices also available in 13
×
reel. Use suffix
e
SCX.
Note 2:
Military grade device with environmental and burn-in processing. Use suffix
e
DMQB, FMQB and LMQB.
Logic Symbols
’F646/’F646B
TL/F/9580–1
’F648
TL/F/9580–7
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M75/Printed in U. S. A.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74F646MSA | 功能描述:總線收發(fā)器 Oct Bus Tran and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F646MSA_Q | 功能描述:總線收發(fā)器 Oct Bus Tran and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F646MSAX | 功能描述:總線收發(fā)器 Oct Bus Tran and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F646SC | 功能描述:總線收發(fā)器 Oct Bus Tran and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F646SCQB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal Transceiver/Register with TRI-STATE Outputs |
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