參數(shù)資料
型號(hào): 74F645PC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Octal Bus Transceiver with 3-STATE Outputs
中文描述: F/FAST SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDIP20
封裝: 0.300 INCH, MS-001, PLASTIC, DIP-20
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 54K
代理商: 74F645PC
1999 Fairchild Semiconductor Corporation
DS010267
www.fairchildsemi.com
July 1989
Revised August 1999
7
74F640 74F645
Octal Bus Transceiver with 3-STATE Outputs
General Description
These devices are octal bus transceivers designed for
asynchronous two-way data flow between the A and B bus-
ses. Both busses are capable of sinking 64 mA, have 3-
STATE outputs, and a common output enable pin. The
direction of data flow is determined by the transmit/receive
(T/R) input. The 74F645 is a high speed/low power version
of the 74F245. The 74F640 is an inverting option of the
74F645.
Features
I
Designed for asynchronous two-way data flow between
busses
I
Outputs sink 64 mA
I
Transmit/receive (T/R) input controls the direction of
data flow
I
74F645 is a lower power, faster version of the 74F245
I
74F640 is an inverting option of the 74F645
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Order Number
74F640SC
74F640PC
74F645PC
Package Number
M20B
N20A
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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