- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360440 > 74F569SC (FAIRCHILD SEMICONDUCTOR CORP) 4-Bit Bidirectional Counter with 3-STATE Outputs PDF資料下載
參數(shù)資料
| 型號(hào)： | 74F569SC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Bidirectional Counter with 3-STATE Outputs |
| 中文描述： | F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 130K |
| 代理商： | 74F569SC |
Philips Semiconductors
Product specification
74F569
4-bit bidirectional binary synchronous counter (3-State)
1996 Jan 05
8
AC SETUP REQUIREMENTS
LIMITS
T
amb
= +25
°
C
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
4.0
4.0
2.0
2.0
5.0
5.0
0
0
8.0
8.0
0
0
10.0
8.0
0
0
8.0
8.0
0
0
7.0
5.0
4.5
6.0
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
4.5
4.5
2.5
2.5
6.0
6.0
0
0
9.0
9.0
0
0
12.5
8.0
0
0
9.0
9.0
0
0
8.0
6.0
5.0
7.0
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
TYP
MAX
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
t
w
(H)
t
REC
Setup time, High or Low
D
n
to CP
Hold time, High or Low
D
n
to CP
Setup time, High or Low
CEP or CET to CP
Hold time, High or Low
CEP or CET to CP
Setup time, High or Low
PE to CP
Hold time, High or Low
PE to CP
Setup time, High or Low
U/D to CP
Hold time, High or Low
U/D to CP
Setup time, High or Low
SR to CP
Hold time, High or Low
SR to CP
CP Pulse width,
High or Low
MR Pulse width, Low
Recovery time, MR to CP
Waveform 6
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Waveform 6
Waveform 7
Waveform 7
Waveform 6
Waveform 6
Waveform 8
Waveform 8
Waveform 9
Waveform 9
Waveform 1
Waveform 5
Waveform 5
AC WAVEFORMS
For all waveforms, V
M
= 1.5V
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
t
PHL
V
M
V
M
V
M
1/f
MAX
t
W
(L)
CP
Q
n
t
W
(H)
t
PLH
V
M
SF01063
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
V
M
t
PHL
V
M
V
M
V
M
CP, CEP,
CET
TC
V
M
SF01064
V
M
V
M
t
PHL
t
PLH
t
PLH
CC
Waveform 2. Propagation Delay, CP, CET,
and CEP to CC and CP to TC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F569SJ | 4-Bit Bidirectional Counter with 3-STATE Outputs |
| 74F574DC | Octal D-Type Flip-Flop |
| 74F574 | Octal transparent latch 3-State |
| 74F573 | Octal transparent latch 3-State |
| 74F573FCQB | Octal D-Type Latch with TRI-STATE Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F569SCX | 功能描述:計(jì)數(shù)器 IC 4-Bit Bidir Dec Ctr RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| 74F569SJ | 功能描述:計(jì)數(shù)器 IC 4-Bit Bidir Dec Ctr RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| 74F569SJX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Synchronous Up/Down Counter |
| 74F573 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal D-Type Latch with TRI-STATE Outputs |
| 74F573_WGH3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。