參數(shù)資料
型號(hào): 74F569
廠商: Fairchild Semiconductor Corporation
元件分類(lèi): 通用總線功能
英文描述: 4-Bit Bidirectional Counter with 3-STATE Outputs
中文描述: 4位雙向計(jì)數(shù)器具有三態(tài)輸出
文件頁(yè)數(shù): 8/14頁(yè)
文件大?。?/td> 130K
代理商: 74F569
Philips Semiconductors
Product specification
74F569
4-bit bidirectional binary synchronous counter (3-State)
1996 Jan 05
8
AC SETUP REQUIREMENTS
LIMITS
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
4.0
4.0
2.0
2.0
5.0
5.0
0
0
8.0
8.0
0
0
10.0
8.0
0
0
8.0
8.0
0
0
7.0
5.0
4.5
6.0
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
4.5
4.5
2.5
2.5
6.0
6.0
0
0
9.0
9.0
0
0
12.5
8.0
0
0
9.0
9.0
0
0
8.0
6.0
5.0
7.0
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
TYP
MAX
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
t
w
(H)
t
REC
Setup time, High or Low
D
n
to CP
Hold time, High or Low
D
n
to CP
Setup time, High or Low
CEP or CET to CP
Hold time, High or Low
CEP or CET to CP
Setup time, High or Low
PE to CP
Hold time, High or Low
PE to CP
Setup time, High or Low
U/D to CP
Hold time, High or Low
U/D to CP
Setup time, High or Low
SR to CP
Hold time, High or Low
SR to CP
CP Pulse width,
High or Low
MR Pulse width, Low
Recovery time, MR to CP
Waveform 6
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Waveform 6
Waveform 7
Waveform 7
Waveform 6
Waveform 6
Waveform 8
Waveform 8
Waveform 9
Waveform 9
Waveform 1
Waveform 5
Waveform 5
AC WAVEFORMS
For all waveforms, V
M
= 1.5V
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
t
PHL
V
M
V
M
V
M
1/f
MAX
t
W
(L)
CP
Q
n
t
W
(H)
t
PLH
V
M
SF01063
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
V
M
t
PHL
V
M
V
M
V
M
CP, CEP,
CET
TC
V
M
SF01064
V
M
V
M
t
PHL
t
PLH
t
PLH
CC
Waveform 2. Propagation Delay, CP, CET,
and CEP to CC and CP to TC
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